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| author | Evan Cheng <evan.cheng@apple.com> | 2008-07-17 19:48:53 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2008-07-17 19:48:53 +0000 |
| commit | 76a4d58998ca41d04f03d21afe0257c36d9ce303 (patch) | |
| tree | 5e02d5f5c77d8bdf78b0cd3a2c53e699d67fdd2f /lib/CodeGen/SimpleRegisterCoalescing.cpp | |
| parent | d1718252b5cdbdf9afdfb4c3b416266d11f36e7d (diff) | |
Subreg live interval valno may not have a corresponding def machineinstr since it's less precise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53734 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SimpleRegisterCoalescing.cpp')
| -rw-r--r-- | lib/CodeGen/SimpleRegisterCoalescing.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/CodeGen/SimpleRegisterCoalescing.cpp b/lib/CodeGen/SimpleRegisterCoalescing.cpp index bc833633ed..5b7f55dfc9 100644 --- a/lib/CodeGen/SimpleRegisterCoalescing.cpp +++ b/lib/CodeGen/SimpleRegisterCoalescing.cpp @@ -1327,7 +1327,7 @@ bool SimpleRegisterCoalescing::RangeIsDefinedByCopyFromReg(LiveInterval &li, // Re-compute it. MachineInstr *DefMI = li_->getInstructionFromIndex(LR->start); unsigned SrcReg, DstReg; - if (tii_->isMoveInstr(*DefMI, SrcReg, DstReg) && + if (DefMI && tii_->isMoveInstr(*DefMI, SrcReg, DstReg) && DstReg == li.reg && SrcReg == Reg) { // Cache computed info. LR->valno->def = LR->start; |