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| author | Evan Cheng <evan.cheng@apple.com> | 2009-07-14 00:51:06 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2009-07-14 00:51:06 +0000 |
| commit | 5ad147281a2c95b662cbc76e879f340118c8bb19 (patch) | |
| tree | 22970711806cd57f76ba247dabb1c84bde75b759 /lib/CodeGen/SimpleRegisterCoalescing.cpp | |
| parent | 4458ab0d83c33a649c61355a4d80e94014193856 (diff) | |
Fix pr4544. When remating, make sure the destination register fits the instruction definition. It may be mismatched due to sub-register coalescing.
No test case yet because the code doesn't trigger until 75408 is re-applied.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75572 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SimpleRegisterCoalescing.cpp')
| -rw-r--r-- | lib/CodeGen/SimpleRegisterCoalescing.cpp | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/lib/CodeGen/SimpleRegisterCoalescing.cpp b/lib/CodeGen/SimpleRegisterCoalescing.cpp index 7dcd4cc6ed..cb5d3f0daa 100644 --- a/lib/CodeGen/SimpleRegisterCoalescing.cpp +++ b/lib/CodeGen/SimpleRegisterCoalescing.cpp @@ -611,6 +611,17 @@ bool SimpleRegisterCoalescing::ReMaterializeTrivialDef(LiveInterval &SrcInt, bool SawStore = false; if (!DefMI->isSafeToMove(tii_, SawStore)) return false; + if (TID.getNumDefs() != 1) + return false; + // Make sure the copy destination register class fits the instruction + // definition register class. The mismatch can happen as a result of earlier + // extract_subreg, insert_subreg, subreg_to_reg coalescing. + const TargetRegisterClass *RC = getInstrOperandRegClass(tri_, TID, 0); + if (TargetRegisterInfo::isVirtualRegister(DstReg)) { + if (mri_->getRegClass(DstReg) != RC) + return false; + } else if (!RC->contains(DstReg)) + return false; unsigned DefIdx = li_->getDefIndex(CopyIdx); const LiveRange *DLR= li_->getInterval(DstReg).getLiveRangeContaining(DefIdx); |
