diff options
| author | Chris Lattner <sabre@nondot.org> | 2005-08-30 01:58:51 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2005-08-30 01:58:51 +0000 |
| commit | f155635b53e02e3460af3374000d22d1f8432f1c (patch) | |
| tree | 5263e1c142b20fa8c131be0a6f3c2ac7a9bd7d27 /lib/CodeGen/SelectionDAG | |
| parent | 55334fc45c27c55de61d895e4ec704f0727ebb46 (diff) | |
Name this variable to be what it really is!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23145 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/ScheduleDAG.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp index 8fac71c372..2cea218117 100644 --- a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp +++ b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp @@ -205,13 +205,13 @@ unsigned SimpleSched::Emit(SDOperand Op) { Emit(Op.getOperand(i)); break; case ISD::CopyToReg: { - SDOperand ChainOp; + SDOperand FlagOp; if (Op.getNumOperands() == 4) - ChainOp = Op.getOperand(3); - if (Op.getOperand(0).Val != ChainOp.Val) + FlagOp = Op.getOperand(3); + if (Op.getOperand(0).Val != FlagOp.Val) Emit(Op.getOperand(0)); // Emit the chain. unsigned Val = Emit(Op.getOperand(2)); - if (ChainOp.Val) Emit(ChainOp); + if (FlagOp.Val) Emit(FlagOp); MRI.copyRegToReg(*BB, BB->end(), cast<RegisterSDNode>(Op.getOperand(1))->getReg(), Val, RegMap->getRegClass(Val)); |