aboutsummaryrefslogtreecommitdiff
path: root/lib/CodeGen/SelectionDAG/TargetLowering.cpp
diff options
context:
space:
mode:
authorChris Lattner <sabre@nondot.org>2007-02-01 04:55:59 +0000
committerChris Lattner <sabre@nondot.org>2007-02-01 04:55:59 +0000
commitfea997aac5773e936754de5436029c2a4fa1e930 (patch)
tree55d1b9167dc9c2444cc9a7dfb42d9b39ed75f7ae /lib/CodeGen/SelectionDAG/TargetLowering.cpp
parente0c2b6b9a8ac874c7b57e445ff1513f0e37581f4 (diff)
Fit in 80 columns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33745 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/TargetLowering.cpp')
-rw-r--r--lib/CodeGen/SelectionDAG/TargetLowering.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index e0e2662ae5..2ebce86a03 100644
--- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -715,7 +715,7 @@ bool TargetLowering::SimplifyDemandedBits(SDOperand Op, uint64_t DemandedMask,
// If none of the top bits are demanded, convert this into an any_extend.
if (NewBits == 0)
- return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::ANY_EXTEND,Op.getValueType(),
+ return TLO.CombineTo(Op,TLO.DAG.getNode(ISD::ANY_EXTEND,Op.getValueType(),
Op.getOperand(0)));
// Since some of the sign extended bits are demanded, we know that the sign