diff options
author | Chris Lattner <sabre@nondot.org> | 2006-02-27 00:36:27 +0000 |
---|---|---|
committer | Chris Lattner <sabre@nondot.org> | 2006-02-27 00:36:27 +0000 |
commit | 81cd35586f5b675faf5391e1f597908bdda5338e (patch) | |
tree | a0865eaa6484dd914875c60a48ce32b9320094ec /lib/CodeGen/SelectionDAG/TargetLowering.cpp | |
parent | 5f0c658aa40c6d1475f7c9daa72497362fbee216 (diff) |
Check RHS simplification before LHS simplification to avoid infinitely looping
on PowerPC/small-arguments.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26389 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/TargetLowering.cpp')
-rw-r--r-- | lib/CodeGen/SelectionDAG/TargetLowering.cpp | 35 |
1 files changed, 17 insertions, 18 deletions
diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp index 1dd2f5f3ed..176ddac024 100644 --- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -201,7 +201,23 @@ bool TargetLowering::SimplifyDemandedBits(SDOperand Op, uint64_t DemandedMask, KnownZero = ~KnownOne & DemandedMask; return false; // Don't fall through, will infinitely loop. case ISD::AND: - // If either the LHS or the RHS are Zero, the result is zero. + // If the RHS is a constant, check to see if the LHS would be zero without + // using the bits from the RHS. Below, we use knowledge about the RHS to + // simplify the LHS, here we're using information from the LHS to simplify + // the RHS. + if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { + uint64_t LHSZero, LHSOne; + ComputeMaskedBits(Op.getOperand(0), DemandedMask, + LHSZero, LHSOne, Depth+1); + // If the LHS already has zeros where RHSC does, this and is dead. + if ((LHSZero & DemandedMask) == (~RHSC->getValue() & DemandedMask)) + return TLO.CombineTo(Op, Op.getOperand(0)); + // If any of the set bits in the RHS are known zero on the LHS, shrink + // the constant. + if (TLO.ShrinkDemandedConstant(Op, ~LHSZero & DemandedMask)) + return true; + } + if (SimplifyDemandedBits(Op.getOperand(1), DemandedMask, KnownZero, KnownOne, TLO, Depth+1)) return true; @@ -224,23 +240,6 @@ bool TargetLowering::SimplifyDemandedBits(SDOperand Op, uint64_t DemandedMask, if (TLO.ShrinkDemandedConstant(Op, DemandedMask & ~KnownZero2)) return true; - // If the RHS is a constant, check to see if the LHS would be zero without - // using the bits from the RHS. Above, we used knowledge about the RHS to - // simplify the LHS, here we're using information from the LHS to simplify - // the RHS. - if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { - uint64_t LHSZero, LHSOne; - ComputeMaskedBits(Op.getOperand(0), DemandedMask, - LHSZero, LHSOne, Depth+1); - // If the LHS already has zeros where RHSC does, this and is dead. - if ((LHSZero & DemandedMask) == (~RHSC->getValue() & DemandedMask)) - return TLO.CombineTo(Op, Op.getOperand(0)); - // If any of the set bits in the RHS are known zero on the LHS, shrink - // the constant. - if (TLO.ShrinkDemandedConstant(Op, ~LHSZero & DemandedMask)) - return true; - } - // Output known-1 bits are only known if set in both the LHS & RHS. KnownOne &= KnownOne2; // Output known-0 are known to be clear if zero in either the LHS | RHS. |