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| author | Eric Christopher <echristo@apple.com> | 2011-06-30 01:20:03 +0000 |
|---|---|---|
| committer | Eric Christopher <echristo@apple.com> | 2011-06-30 01:20:03 +0000 |
| commit | 5244c4cc2fd31e49bae2b192bd824a94b6ad5331 (patch) | |
| tree | 1e145997fe24d103795e61325751e335aa8177dd /lib/CodeGen/SelectionDAG/TargetLowering.cpp | |
| parent | 0a1509e779d3f97bb1df68c9e63c41ff5b66441d (diff) | |
Remove getRegClassForInlineAsmConstraint and all dependencies.
Fixes rdar://9643582
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134123 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/TargetLowering.cpp')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/TargetLowering.cpp | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp index 474dd7a9fc..758296e3c3 100644 --- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -2737,13 +2737,6 @@ void TargetLowering::LowerAsmOperandForConstraint(SDValue Op, } } -std::vector<unsigned> TargetLowering:: -getRegClassForInlineAsmConstraint(const std::string &Constraint, - EVT VT) const { - return std::vector<unsigned>(); -} - - std::pair<unsigned, const TargetRegisterClass*> TargetLowering:: getRegForInlineAsmConstraint(const std::string &Constraint, EVT VT) const { |