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authorEvan Cheng <evan.cheng@apple.com>2010-04-17 06:13:15 +0000
committerEvan Cheng <evan.cheng@apple.com>2010-04-17 06:13:15 +0000
commite5b51ac7708402473f0a558f4aac74fab63d4f7e (patch)
treefc4b7c5802dbc3431de88c9ecf220d087478d748 /lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
parent4ff28527bb8e5ed4ae4b65f0fa6967eb79a05d4c (diff)
More work to allow dag combiner to promote 16-bit ops to 32-bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101621 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp')
-rw-r--r--lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index 9082fb6fbe..4b7fb86971 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -355,7 +355,7 @@ void SelectionDAGISel::ShrinkDemandedOps() {
InWorklist.insert(I);
}
- TargetLowering::TargetLoweringOpt TLO(*CurDAG, true);
+ TargetLowering::TargetLoweringOpt TLO(*CurDAG, true, true, true);
while (!Worklist.empty()) {
SDNode *N = Worklist.pop_back_val();
InWorklist.erase(N);