diff options
author | Evan Cheng <evan.cheng@apple.com> | 2007-07-06 01:47:35 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2007-07-06 01:47:35 +0000 |
commit | 86da6600aec9b8f1c3fbae157414bf1648eb639c (patch) | |
tree | d16543088dea4ce308f2e579892d927705d820bc /lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | |
parent | 991262834d688c02e279017335dac34579848b99 (diff) |
Workaround of getCopyToRegs and getCopyFromRegs bugs for big-endian machines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37935 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp')
-rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index c9f450d3dc..e9a9b49af1 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -2984,8 +2984,10 @@ void SelectionDAGLowering::visitCall(CallInst &I) { /// If the Flag pointer is NULL, no flag is used. SDOperand RegsForValue::getCopyFromRegs(SelectionDAG &DAG, SDOperand &Chain, SDOperand *Flag)const{ - // Get the list of registers. + // Get the list of registers, in the appropriate order. std::vector<unsigned> R(Regs); + if (!DAG.getTargetLoweringInfo().isLittleEndian()) + std::reverse(R.begin(), R.end()); // Copy the legal parts from the registers. unsigned NumParts = Regs.size(); @@ -3001,7 +3003,7 @@ SDOperand RegsForValue::getCopyFromRegs(SelectionDAG &DAG, } // Assemble the legal parts into the final value. - return getCopyFromParts(DAG, &Parts[0], NumParts, RegVT, ValueVT, true); + return getCopyFromParts(DAG, &Parts[0], NumParts, RegVT, ValueVT, false); } /// getCopyToRegs - Emit a series of CopyToReg nodes that copies the @@ -3010,13 +3012,15 @@ SDOperand RegsForValue::getCopyFromRegs(SelectionDAG &DAG, /// If the Flag pointer is NULL, no flag is used. void RegsForValue::getCopyToRegs(SDOperand Val, SelectionDAG &DAG, SDOperand &Chain, SDOperand *Flag) const { - // Get the list of registers. + // Get the list of registers, in the appropriate order. std::vector<unsigned> R(Regs); + if (!DAG.getTargetLoweringInfo().isLittleEndian()) + std::reverse(R.begin(), R.end()); // Get the list of the values's legal parts. unsigned NumParts = Regs.size(); SmallVector<SDOperand, 8> Parts(NumParts); - getCopyToParts(DAG, Val, &Parts[0], NumParts, RegVT, true); + getCopyToParts(DAG, Val, &Parts[0], NumParts, RegVT, false); // Copy the parts into the registers. for (unsigned i = 0; i != NumParts; ++i) { |