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authorChris Lattner <sabre@nondot.org>2008-01-25 17:24:52 +0000
committerChris Lattner <sabre@nondot.org>2008-01-25 17:24:52 +0000
commit5bab78527a946632cd9614daa0b9a82ee7b5e1cc (patch)
tree73cd4cdcdbd080e6dd0dc51c7a36abcd6c2dc7e7 /lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
parent1910e2f3ecec461d1eab8c44b16c977539080a6e (diff)
fix long lines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46355 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp')
-rw-r--r--lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp5
1 files changed, 3 insertions, 2 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index 93de4f0f75..4b88f7884f 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -57,7 +57,7 @@ ViewSchedDAGs("view-sched-dags", cl::Hidden,
cl::desc("Pop up a window to show sched dags as they are processed"));
static cl::opt<bool>
ViewSUnitDAGs("view-sunit-dags", cl::Hidden,
- cl::desc("Pop up a window to show SUnit dags after they are processed"));
+ cl::desc("Pop up a window to show SUnit dags after they are processed"));
#else
static const bool ViewISelDAGs = 0, ViewSchedDAGs = 0, ViewSUnitDAGs = 0;
#endif
@@ -79,7 +79,8 @@ namespace {
RegisterPassParser<RegisterScheduler> >
ISHeuristic("pre-RA-sched",
cl::init(&createDefaultScheduler),
- cl::desc("Instruction schedulers available (before register allocation):"));
+ cl::desc("Instruction schedulers available (before register"
+ " allocation):"));
static RegisterScheduler
defaultListDAGScheduler("default", " Best scheduler for the target",