diff options
author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-01-10 02:58:51 +0000 |
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committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-01-10 02:58:51 +0000 |
commit | c9df025e33ac435adb3b3318d237c36ca7cec659 (patch) | |
tree | 80a9dfcbb33fcfa3fbfdff2b2f9e6ba80ed170fc /lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | |
parent | fdc8f2d2604877d80f64e309d4b03ea67addf037 (diff) |
Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic.
These functions not longer assert when passed 0, but simply return false instead.
No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123155 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp')
-rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp index 05acb034e8..4ea8e4de81 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -4070,7 +4070,7 @@ SelectionDAGBuilder::EmitFuncArgumentDbgValue(const Value *V, MDNode *Variable, if (N.getNode() && N.getOpcode() == ISD::CopyFromReg) { Reg = cast<RegisterSDNode>(N.getOperand(1))->getReg(); - if (Reg && TargetRegisterInfo::isVirtualRegister(Reg)) { + if (TargetRegisterInfo::isVirtualRegister(Reg)) { MachineRegisterInfo &RegInfo = MF.getRegInfo(); unsigned PR = RegInfo.getLiveInPhysReg(Reg); if (PR) |