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| author | James Molloy <james.molloy@arm.com> | 2012-09-06 09:16:01 +0000 |
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| committer | James Molloy <james.molloy@arm.com> | 2012-09-06 09:16:01 +0000 |
| commit | 6c822eea47dbef96940819b1ea085fabc49a1e71 (patch) | |
| tree | e9d2318a4f16d3ae149ba9e4f2794ba5f28c5f07 /lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | |
| parent | 7859f438e198fe441abef3d2c95c1cb9517f575b (diff) | |
Optimize codegen for VSETLNi{8,16,32} operating on Q registers. Degenerate to a VSETLN on D registers, instead of an (INSERT_SUBREG (VSETLN (EXTRACT_SUBREG ))) sequence to help the register coalescer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163298 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp')
0 files changed, 0 insertions, 0 deletions