diff options
| author | Dan Gohman <gohman@apple.com> | 2008-09-12 16:56:44 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2008-09-12 16:56:44 +0000 |
| commit | f5aeb1a8e4cf272c7348376d185ef8d8267653e0 (patch) | |
| tree | 26c1d701871fd86197411a728c2dfde5c805254b /lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp | |
| parent | 0e3b7b2f91427807c3f544e96818072cc804e1d3 (diff) | |
Rename ConstantSDNode::getValue to getZExtValue, for consistency
with ConstantInt. This led to fixing a bug in TargetLowering.cpp
using getValue instead of getAPIntValue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56159 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp index d02dffa694..f6a6d7ad6c 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp @@ -3601,7 +3601,7 @@ SelectionDAGLowering::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) { // lower memmove as memcpy. uint64_t Size = -1ULL; if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op3)) - Size = C->getValue(); + Size = C->getZExtValue(); if (AA->alias(I.getOperand(1), Size, I.getOperand(2), Size) == AliasAnalysis::NoAlias) { DAG.setRoot(DAG.getMemcpy(getRoot(), Op1, Op2, Op3, Align, false, @@ -4957,7 +4957,7 @@ void SelectionDAGLowering::visitInlineAsm(CallSite CS) { for (; OperandNo; --OperandNo) { // Advance to the next operand. unsigned NumOps = - cast<ConstantSDNode>(AsmNodeOperands[CurOp])->getValue(); + cast<ConstantSDNode>(AsmNodeOperands[CurOp])->getZExtValue(); assert(((NumOps & 7) == 2 /*REGDEF*/ || (NumOps & 7) == 4 /*MEM*/) && "Skipped past definitions?"); @@ -4965,7 +4965,7 @@ void SelectionDAGLowering::visitInlineAsm(CallSite CS) { } unsigned NumOps = - cast<ConstantSDNode>(AsmNodeOperands[CurOp])->getValue(); + cast<ConstantSDNode>(AsmNodeOperands[CurOp])->getZExtValue(); if ((NumOps & 7) == 2 /*REGDEF*/) { // Add NumOps>>3 registers to MatchedRegs. RegsForValue MatchedRegs; |