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authorTanya Lattner <tonic@nondot.org>2009-01-27 22:34:30 +0000
committerTanya Lattner <tonic@nondot.org>2009-01-27 22:34:30 +0000
commitfbb018133766f9af2195b802be8fda780e5c2cec (patch)
tree40859748012f32f176525df03e56ab8468a2af2d /lib/CodeGen/SelectionDAG/SelectionDAG.cpp
parentcdc2f05f72ca7a66ca6b33e2817b03ad14083c13 (diff)
Merge from mainline.
Don't create ISD::FNEG nodes after legalize if they aren't legal. Simplify x+0 to x in unsafe-fp-math mode. This avoids a bunch of redundant work in many cases, because in unsafe-fp-math mode, ISD::FADD with a constant is considered free to negate, so the DAGCombiner often negates x+0 to -0-x thinking it's free, when in reality the end result is -x, which is more expensive than x. Also, combine x*0 to 0. This fixes PR3374. git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_25@63144 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/SelectionDAG.cpp')
-rw-r--r--lib/CodeGen/SelectionDAG/SelectionDAG.cpp15
1 files changed, 13 insertions, 2 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 2a456dce33..cb8e69efe4 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -27,6 +27,7 @@
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Target/TargetData.h"
#include "llvm/Target/TargetLowering.h"
+#include "llvm/Target/TargetOptions.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Support/CommandLine.h"
@@ -2376,16 +2377,26 @@ SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
case ISD::UREM:
case ISD::MULHU:
case ISD::MULHS:
- assert(VT.isInteger() && "This operator does not apply to FP types!");
- // fall through
case ISD::MUL:
case ISD::SDIV:
case ISD::SREM:
+ assert(VT.isInteger() && "This operator does not apply to FP types!");
+ // fall through
case ISD::FADD:
case ISD::FSUB:
case ISD::FMUL:
case ISD::FDIV:
case ISD::FREM:
+ if (UnsafeFPMath && Opcode == ISD::FADD) {
+ // 0+x --> x
+ if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
+ if (CFP->getValueAPF().isZero())
+ return N2;
+ // x+0 --> x
+ if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
+ if (CFP->getValueAPF().isZero())
+ return N1;
+ }
assert(N1.getValueType() == N2.getValueType() &&
N1.getValueType() == VT && "Binary operator types must match!");
break;