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| author | Nate Begeman <natebegeman@mac.com> | 2006-01-11 21:21:00 +0000 |
|---|---|---|
| committer | Nate Begeman <natebegeman@mac.com> | 2006-01-11 21:21:00 +0000 |
| commit | 35ef913ec21de0f4f1b39c811b4335438717a9b8 (patch) | |
| tree | de64c2b7d38a608eebb10fe434876c35470fefb0 /lib/CodeGen/SelectionDAG/SelectionDAG.cpp | |
| parent | a243db8c41bd8ace6e002c9e1fdcdc7256ebf677 (diff) | |
Add bswap, rotl, and rotr nodes
Add dag combiner code to recognize rotl, rotr
Add ppc code to match rotl
Targets should add rotl/rotr patterns if they have them
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25222 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/SelectionDAG.cpp')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index 5a0e2bf386..4ecea2f42b 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -983,6 +983,8 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, case ISD::SHL: case ISD::SRA: case ISD::SRL: + case ISD::ROTL: + case ISD::ROTR: assert(VT == N1.getValueType() && "Shift operators return type must be the same as their first arg"); assert(MVT::isInteger(VT) && MVT::isInteger(N2.getValueType()) && @@ -1039,6 +1041,12 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, case ISD::SHL : return getConstant(C1 << C2, VT); case ISD::SRL : return getConstant(C1 >> C2, VT); case ISD::SRA : return getConstant(N1C->getSignExtended() >>(int)C2, VT); + case ISD::ROTL : + return getConstant((C1 << C2) | (C1 >> (MVT::getSizeInBits(VT) - C2)), + VT); + case ISD::ROTR : + return getConstant((C1 >> C2) | (C1 << (MVT::getSizeInBits(VT) - C2)), + VT); default: break; } } else { // Cannonicalize constant to RHS if commutative @@ -1915,6 +1923,9 @@ const char *SDNode::getOperationName(const SelectionDAG *G) const { case ISD::SHL: return "shl"; case ISD::SRA: return "sra"; case ISD::SRL: return "srl"; + case ISD::ROTL: return "rotl"; + case ISD::ROTR: return "rotr"; + case ISD::BSWAP: return "bswap"; case ISD::FADD: return "fadd"; case ISD::FSUB: return "fsub"; case ISD::FMUL: return "fmul"; |