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author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-10-17 17:33:39 +0000 |
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committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-10-17 17:33:39 +0000 |
commit | 4007529d4b014f43a1c7089f9b285a67c1c9b853 (patch) | |
tree | dd904079cb08573e3b3e184889864280a3a2c9f4 /lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | |
parent | 827454e6e28cfed93db990b03b720ef7c23e6917 (diff) |
Admonish that MI is not IR and virtual registers have constraints.
In machine code, you can't just replaceRegWith() the same way you can
replaceAllUsesWith() in IR. Virtual registers may have different
register classes that need to be merged first.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142201 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp')
0 files changed, 0 insertions, 0 deletions