diff options
author | Rafael Espindola <rafael.espindola@gmail.com> | 2010-07-11 04:01:49 +0000 |
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committer | Rafael Espindola <rafael.espindola@gmail.com> | 2010-07-11 04:01:49 +0000 |
commit | cbeeae23c31d32b833c9c7c3e8984e4cbcf22f45 (patch) | |
tree | 75fe2f72c8e4d9e68e7c9ec8c7655f4d94d710f3 /lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp | |
parent | 4f8e771ae89bcf934f931d64ef3ad9a188ce4921 (diff) |
Fix va_arg for doubles. With this patch VAARG nodes always contain the
correct alignment information, which simplifies ExpandRes_VAARG a bit.
The patch introduces a new alignment information to TargetLoweringInfo. This is
needed since the two natural candidates cannot be used:
* The 's' in target data: If this is set to the minimal alignment of any
argument, getCallFrameTypeAlignment would return 4 for doubles on ARM for
example.
* The getTransientStackAlignment method. It is possible for an architecture to
have argument less aligned than what we maintain the stack pointer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108072 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp')
-rw-r--r-- | lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp b/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp index 71adb33617..9c2b1d9ed7 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp @@ -243,13 +243,10 @@ void DAGTypeLegalizer::ExpandRes_VAARG(SDNode *N, SDValue &Lo, SDValue &Hi) { SDValue Chain = N->getOperand(0); SDValue Ptr = N->getOperand(1); DebugLoc dl = N->getDebugLoc(); - const unsigned OldAlign = N->getConstantOperandVal(3); - const Type *Type = OVT.getTypeForEVT(*DAG.getContext()); - const unsigned TypeAlign = TLI.getTargetData()->getABITypeAlignment(Type); - const unsigned Align = std::max(OldAlign, TypeAlign); + const unsigned Align = N->getConstantOperandVal(3); Lo = DAG.getVAArg(NVT, dl, Chain, Ptr, N->getOperand(2), Align); - Hi = DAG.getVAArg(NVT, dl, Lo.getValue(1), Ptr, N->getOperand(2)); + Hi = DAG.getVAArg(NVT, dl, Lo.getValue(1), Ptr, N->getOperand(2), 0); // Handle endianness of the load. if (TLI.isBigEndian()) |