diff options
author | Dale Johannesen <dalej@apple.com> | 2009-02-06 23:05:02 +0000 |
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committer | Dale Johannesen <dalej@apple.com> | 2009-02-06 23:05:02 +0000 |
commit | e8d7230f480654cdb8ff1c3d0a38e1e9ab0bd55f (patch) | |
tree | 549d56aad780475ce3fa10a4fb13248073d6dac0 /lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | |
parent | e72c5964d5263f2489bf2c7e9d32f71271d205fc (diff) |
Remove more non-DebugLoc getNode variants. Use
getCALLSEQ_{END,START} to permit passing no DebugLoc
there. UNDEF doesn't logically have DebugLoc; add
getUNDEF to encapsulate this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63978 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp')
-rw-r--r-- | lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp index 92b7b3033b..4005d5abe2 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp @@ -592,8 +592,7 @@ SDValue DAGTypeLegalizer::PromoteIntRes_UDIV(SDNode *N) { } SDValue DAGTypeLegalizer::PromoteIntRes_UNDEF(SDNode *N) { - return DAG.getNode(ISD::UNDEF, N->getDebugLoc(), - TLI.getTypeToTransformTo(N->getValueType(0))); + return DAG.getUNDEF(TLI.getTypeToTransformTo(N->getValueType(0))); } SDValue DAGTypeLegalizer::PromoteIntRes_VAARG(SDNode *N) { @@ -1314,7 +1313,7 @@ void DAGTypeLegalizer::ExpandIntRes_ANY_EXTEND(SDNode *N, if (Op.getValueType().bitsLE(NVT)) { // The low part is any extension of the input (which degenerates to a copy). Lo = DAG.getNode(ISD::ANY_EXTEND, dl, NVT, Op); - Hi = DAG.getNode(ISD::UNDEF, dl, NVT); // The high part is undefined. + Hi = DAG.getUNDEF(NVT); // The high part is undefined. } else { // For example, extension of an i48 to an i64. The operand type necessarily // promotes to the result type, so will end up being expanded too. @@ -1495,7 +1494,7 @@ void DAGTypeLegalizer::ExpandIntRes_LOAD(LoadSDNode *N, } else { assert(ExtType == ISD::EXTLOAD && "Unknown extload!"); // The high part is undefined. - Hi = DAG.getNode(ISD::UNDEF, dl, NVT); + Hi = DAG.getUNDEF(NVT); } } else if (TLI.isLittleEndian()) { // Little-endian - low bits are at low addresses. |