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author | Owen Anderson <resistor@mac.com> | 2011-02-28 21:10:10 +0000 |
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committer | Owen Anderson <resistor@mac.com> | 2011-02-28 21:10:10 +0000 |
commit | 69732892087e70182d863cc72453be30f31b7793 (patch) | |
tree | 8511d88bf47786b97ef55573b8eb5696c7821100 /lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | |
parent | c6d160bfa22fcb06c80c4c6cfc10ddbe7d8d28e4 (diff) |
Use the correct shift amount type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126684 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp')
-rw-r--r-- | lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp index c3e9f9aee6..767b774da2 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp @@ -226,7 +226,7 @@ SDValue DAGTypeLegalizer::PromoteIntRes_BSWAP(SDNode *N) { unsigned DiffBits = NVT.getSizeInBits() - OVT.getSizeInBits(); return DAG.getNode(ISD::SRL, dl, NVT, DAG.getNode(ISD::BSWAP, dl, NVT, Op), - DAG.getConstant(DiffBits, TLI.getPointerTy())); + DAG.getConstant(DiffBits, TLI.getShiftAmountTy(NVT))); } SDValue DAGTypeLegalizer::PromoteIntRes_BUILD_PAIR(SDNode *N) { |