diff options
| author | Duncan Sands <baldrick@free.fr> | 2008-11-12 08:23:26 +0000 |
|---|---|---|
| committer | Duncan Sands <baldrick@free.fr> | 2008-11-12 08:23:26 +0000 |
| commit | 245146b58a2188eb69bcb34fc2bdf57ebbcfb278 (patch) | |
| tree | 27b7ba81830111fe5014d5a5aeb03d0aeab3bf7a /lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | |
| parent | e7c3551e6f75ca3fc8a3a30e8ca5f9c19edbe2e3 (diff) | |
Correct some thinkos in the expansion of ADD/SUB
when the target does not support ADDC/SUBC. This
fixes PR3044.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59120 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp index 508fb4802a..de1d94c72b 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp @@ -1228,7 +1228,6 @@ void DAGTypeLegalizer::ExpandIntRes_ADDSUB(SDNode *N, GetExpandedInteger(N->getOperand(1), RHSL, RHSH); MVT NVT = LHSL.getValueType(); - SDVTList VTList = DAG.getVTList(NVT, MVT::Flag); SDValue LoOps[2] = { LHSL, RHSL }; SDValue HiOps[3] = { LHSH, RHSH }; @@ -1242,6 +1241,7 @@ void DAGTypeLegalizer::ExpandIntRes_ADDSUB(SDNode *N, TLI.getTypeToExpandTo(NVT)); if (hasCarry) { + SDVTList VTList = DAG.getVTList(NVT, MVT::Flag); if (N->getOpcode() == ISD::ADD) { Lo = DAG.getNode(ISD::ADDC, VTList, LoOps, 2); HiOps[2] = Lo.getValue(1); @@ -1253,8 +1253,8 @@ void DAGTypeLegalizer::ExpandIntRes_ADDSUB(SDNode *N, } } else { if (N->getOpcode() == ISD::ADD) { - Lo = DAG.getNode(ISD::ADD, VTList, LoOps, 2); - Hi = DAG.getNode(ISD::ADD, VTList, HiOps, 2); + Lo = DAG.getNode(ISD::ADD, NVT, LoOps, 2); + Hi = DAG.getNode(ISD::ADD, NVT, HiOps, 2); SDValue Cmp1 = DAG.getSetCC(TLI.getSetCCResultType(Lo), Lo, LoOps[0], ISD::SETULT); SDValue Carry1 = DAG.getNode(ISD::SELECT, NVT, Cmp1, @@ -1266,9 +1266,10 @@ void DAGTypeLegalizer::ExpandIntRes_ADDSUB(SDNode *N, DAG.getConstant(1, NVT), Carry1); Hi = DAG.getNode(ISD::ADD, NVT, Hi, Carry2); } else { - Lo = DAG.getNode(ISD::SUB, VTList, LoOps, 2); - Hi = DAG.getNode(ISD::SUB, VTList, HiOps, 2); - SDValue Cmp = DAG.getSetCC(NVT, LoOps[0], LoOps[1], ISD::SETULT); + Lo = DAG.getNode(ISD::SUB, NVT, LoOps, 2); + Hi = DAG.getNode(ISD::SUB, NVT, HiOps, 2); + SDValue Cmp = DAG.getSetCC(TLI.getSetCCResultType(LoOps[0]), + LoOps[0], LoOps[1], ISD::SETULT); SDValue Borrow = DAG.getNode(ISD::SELECT, NVT, Cmp, DAG.getConstant(1, NVT), DAG.getConstant(0, NVT)); |