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authorRichard Osborne <richard@xmos.com>2008-11-17 17:34:31 +0000
committerRichard Osborne <richard@xmos.com>2008-11-17 17:34:31 +0000
commit104de6cf7b80ec5e9beb502a069f376810a0a1e3 (patch)
treec431dc740afc8e8addeaca74fc17bed1ce535a84 /lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
parent35fde150591d7c5f032a5e7c9643315e5f2bedde (diff)
Don't produce ADDC/ADDE when expanding SHL unless they are legal
for the target. This fixes PR3080. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59450 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp')
-rw-r--r--lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp3
1 files changed, 2 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
index fb05f334c0..ddc339c324 100644
--- a/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
@@ -1073,7 +1073,8 @@ void DAGTypeLegalizer::ExpandShiftByConstant(SDNode *N, unsigned Amt,
} else if (Amt == NVTBits) {
Lo = DAG.getConstant(0, NVT);
Hi = InL;
- } else if (Amt == 1) {
+ } else if (Amt == 1 &&
+ TLI.isOperationLegal(ISD::ADDC, TLI.getTypeToExpandTo(NVT))) {
// Emit this X << 1 as X+X.
SDVTList VTList = DAG.getVTList(NVT, MVT::Flag);
SDValue LoOps[2] = { InL, InL };