diff options
| author | Duncan Sands <baldrick@free.fr> | 2007-11-09 08:57:19 +0000 |
|---|---|---|
| committer | Duncan Sands <baldrick@free.fr> | 2007-11-09 08:57:19 +0000 |
| commit | c6fa170b4db6659c411e77a9a5144ae2e92136c7 (patch) | |
| tree | 4c3db1fd150addb8ddb1793a79cf3a443c714fb8 /lib/CodeGen/SelectionDAG/LegalizeDAGTypes.cpp | |
| parent | f6bd0ce4c9a9c08500ab50cea322770c611d1af3 (diff) | |
Fix some load/store logic that would be wrong for
apints on big-endian machines if the bitwidth is
not a multiple of 8. Introduce a new helper,
MVT::getStoreSizeInBits, and use it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43934 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/LegalizeDAGTypes.cpp')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/LegalizeDAGTypes.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAGTypes.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAGTypes.cpp index 11431ee086..825134130c 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeDAGTypes.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeDAGTypes.cpp @@ -1036,7 +1036,7 @@ void DAGTypeLegalizer::ExpandResult_LOAD(LoadSDNode *N, // Big-endian - high bits are at low addresses. Favor aligned loads at // the cost of some bit-fiddling. MVT::ValueType EVT = N->getLoadedVT(); - unsigned EBytes = (MVT::getSizeInBits(EVT) + 7)/8; + unsigned EBytes = MVT::getStoreSizeInBits(EVT)/8; unsigned IncrementSize = MVT::getSizeInBits(NVT)/8; unsigned ExcessBits = (EBytes - IncrementSize)*8; @@ -2069,7 +2069,7 @@ SDOperand DAGTypeLegalizer::ExpandOperand_STORE(StoreSDNode *N, unsigned OpNo) { GetExpandedOp(N->getValue(), Lo, Hi); MVT::ValueType EVT = N->getStoredVT(); - unsigned EBytes = (MVT::getSizeInBits(EVT) + 7)/8; + unsigned EBytes = MVT::getStoreSizeInBits(EVT)/8; unsigned IncrementSize = MVT::getSizeInBits(NVT)/8; unsigned ExcessBits = (EBytes - IncrementSize)*8; MVT::ValueType HiVT = |