diff options
| author | Dan Gohman <gohman@apple.com> | 2007-06-22 14:59:07 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2007-06-22 14:59:07 +0000 |
| commit | ea859be53ca13a1547c4675549946b74dc3c6f41 (patch) | |
| tree | 4d2b626f429ffbcb1c588b666b018327f72c3c90 /lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | |
| parent | a8c768293966822840199b496a9b020b6b460e8d (diff) | |
Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from
TargetLowering to SelectionDAG so that they have more convenient
access to the current DAG, in preparation for the ValueType routines
being changed from standalone functions to members of SelectionDAG for
the pre-legalize vector type changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37704 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/LegalizeDAG.cpp')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index 0584d6ed6e..57357442fb 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -1449,7 +1449,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { // The top bits of the promoted condition are not necessarily zero, ensure // that the value is properly zero extended. - if (!TLI.MaskedValueIsZero(Tmp2, + if (!DAG.MaskedValueIsZero(Tmp2, MVT::getIntVTBitMask(Tmp2.getValueType())^1)) Tmp2 = DAG.getZeroExtendInReg(Tmp2, MVT::i1); break; @@ -2041,7 +2041,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { case Promote: Tmp1 = PromoteOp(Node->getOperand(0)); // Promote the condition. // Make sure the condition is either zero or one. - if (!TLI.MaskedValueIsZero(Tmp1, + if (!DAG.MaskedValueIsZero(Tmp1, MVT::getIntVTBitMask(Tmp1.getValueType())^1)) Tmp1 = DAG.getZeroExtendInReg(Tmp1, MVT::i1); break; @@ -4209,7 +4209,7 @@ bool SelectionDAGLegalize::ExpandShift(unsigned Opc, SDOperand Op,SDOperand Amt, // Okay, the shift amount isn't constant. However, if we can tell that it is // >= 32 or < 32, we can still simplify it, without knowing the actual value. uint64_t Mask = NVTBits, KnownZero, KnownOne; - TLI.ComputeMaskedBits(Amt, Mask, KnownZero, KnownOne); + DAG.ComputeMaskedBits(Amt, Mask, KnownZero, KnownOne); // If we know that the high bit of the shift amount is one, then we can do // this as a couple of simple shifts. |