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| author | Andrew Lenharth <andrewl@lenharth.org> | 2005-07-02 20:58:53 +0000 |
|---|---|---|
| committer | Andrew Lenharth <andrewl@lenharth.org> | 2005-07-02 20:58:53 +0000 |
| commit | c6bead211b608c51270e821f28bb50eed71be6c9 (patch) | |
| tree | 71433b9db3d95e275a51d591d6e55e61baadb92b /lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | |
| parent | 37113722330ffaf4844d67a49067c31fcef05bcc (diff) | |
I really didn't think this was necessary. But, Legalize wasn't running again
and legalizing the extload. Strange. Should fix most alpha regressions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22329 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/LegalizeDAG.cpp')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index 9a2740457f..51375c5c8e 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -1351,8 +1351,9 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { DAG.getSrcValue(NULL)); else { assert(Node->getValueType(0) == MVT::f64 && "Unexpected conversion"); - FudgeInReg = DAG.getNode(ISD::EXTLOAD, MVT::f64, DAG.getEntryNode(), - CPIdx, DAG.getSrcValue(NULL), MVT::f32); + FudgeInReg = + LegalizeOp(DAG.getNode(ISD::EXTLOAD, MVT::f64, DAG.getEntryNode(), + CPIdx, DAG.getSrcValue(NULL), MVT::f32)); } Result = DAG.getNode(ISD::ADD, Node->getValueType(0), Tmp1, FudgeInReg); break; |