diff options
| author | Duncan Sands <baldrick@free.fr> | 2008-07-10 15:33:02 +0000 |
|---|---|---|
| committer | Duncan Sands <baldrick@free.fr> | 2008-07-10 15:33:02 +0000 |
| commit | be1ad4de2900451626c8d4ace07b9ea16099ea1d (patch) | |
| tree | 25c0c75b1a0467970366ab6bbe5484977a97d3e7 /lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | |
| parent | 03dc093a2e63d20984c8fd67809fa762f1e31f1a (diff) | |
Add a mysteriously missing libcall, FPTOSINT_F80_I32.
Be nice to 16 bit machines by supporting FP_TO_XINT
expansion for these.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53407 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/LegalizeDAG.cpp')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index eddce0f817..80502cfe69 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -3770,6 +3770,10 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { LC = RTLIB::FPTOSINT_F32_I32; else if (OVT == MVT::f64) LC = RTLIB::FPTOSINT_F64_I32; + else if (OVT == MVT::f80) + LC = RTLIB::FPTOSINT_F80_I32; + else if (OVT == MVT::ppcf128) + LC = RTLIB::FPTOSINT_PPCF128_I32; else assert(0 && "Unexpected i32-to-fp conversion!"); } else if (VT == MVT::i64) { |