aboutsummaryrefslogtreecommitdiff
path: root/lib/CodeGen/SelectionDAG/FastISel.cpp
diff options
context:
space:
mode:
authorEvan Cheng <evan.cheng@apple.com>2010-01-12 00:09:37 +0000
committerEvan Cheng <evan.cheng@apple.com>2010-01-12 00:09:37 +0000
commita5a81d70720a4ce6ac7538927c2a874b0dfa8bd2 (patch)
treea97a5454dfbd99f0a45929908becf7cc692b74af /lib/CodeGen/SelectionDAG/FastISel.cpp
parent77beb479f556093c5f1b4854fcbb095cda34f202 (diff)
Add TargetInstrInfo::isCoalescableInstr. It returns true if the specified
instruction is copy like where the source and destination registers can overlap. This is to be used by the coalescable to coalesce the source and destination registers of instructions like X86::MOVSX64rr32. Apparently some crazy people believe the coalescer is too simple. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93210 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/FastISel.cpp')
0 files changed, 0 insertions, 0 deletions