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authorOwen Anderson <resistor@mac.com>2008-09-05 00:06:23 +0000
committerOwen Anderson <resistor@mac.com>2008-09-05 00:06:23 +0000
commit95267a1e671efc3c14e916b6978bbb15973b4cdc (patch)
treeaa96525ef26e6b7a75ba4672ddc8cbe7bf845c0c /lib/CodeGen/SelectionDAG/FastISel.cpp
parent6e3f05f5cebe230bb95f01b5afcc3c8e94106402 (diff)
Add initial support for selecting constant materializations that require constant
pool loads on X86 in fast isel. This isn't actually used yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55814 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/FastISel.cpp')
-rw-r--r--lib/CodeGen/SelectionDAG/FastISel.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/FastISel.cpp b/lib/CodeGen/SelectionDAG/FastISel.cpp
index d118eefd22..043691cf07 100644
--- a/lib/CodeGen/SelectionDAG/FastISel.cpp
+++ b/lib/CodeGen/SelectionDAG/FastISel.cpp
@@ -80,7 +80,7 @@ unsigned FastISel::getRegForValue(Value *V) {
/// NOTE: This is only necessary because we might select a block that uses
/// a value before we select the block that defines the value. It might be
/// possible to fix this by selecting blocks in reverse postorder.
-void FastISel::UpdateValueMap(Instruction* I, unsigned Reg) {
+void FastISel::UpdateValueMap(Value* I, unsigned Reg) {
if (!ValueMap.count(I))
ValueMap[I] = Reg;
else