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authorOwen Anderson <resistor@mac.com>2008-08-26 18:51:24 +0000
committerOwen Anderson <resistor@mac.com>2008-08-26 18:51:24 +0000
commit77a218765ac85b2e0c6ce01bf8a7b07dfe80bead (patch)
tree78083b71847eab4f868be3cebba3351cbd25695c /lib/CodeGen/SelectionDAG/FastISel.cpp
parenta317767f0e5ecc8106ab9836d0f3702b1c00bedf (diff)
Use a combination of copyRegToReg and ISD::BIT_CONVERT when doing fast isel of bitcasts,
allowing it to support the full range of conversions people might ask for in a correct manner. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55378 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/FastISel.cpp')
-rw-r--r--lib/CodeGen/SelectionDAG/FastISel.cpp27
1 files changed, 19 insertions, 8 deletions
diff --git a/lib/CodeGen/SelectionDAG/FastISel.cpp b/lib/CodeGen/SelectionDAG/FastISel.cpp
index 387929e751..cc30e32114 100644
--- a/lib/CodeGen/SelectionDAG/FastISel.cpp
+++ b/lib/CodeGen/SelectionDAG/FastISel.cpp
@@ -251,19 +251,30 @@ FastISel::SelectInstructions(BasicBlock::iterator Begin,
// Unhandled type. Halt "fast" selection and bail.
return I;
- // Otherwise, insert a register-to-register copy.
- TargetRegisterClass* SrcClass = TLI.getRegClassFor(SrcVT);
- TargetRegisterClass* DstClass = TLI.getRegClassFor(DstVT);
unsigned Op0 = ValueMap[I->getOperand(0)];
- unsigned ResultReg = createResultReg(DstClass);
-
if (Op0 == 0)
// Unhandled operand. Halt "fast" selection and bail.
return false;
- bool InsertedCopy = TII.copyRegToReg(*MBB, MBB->end(), ResultReg,
- Op0, DstClass, SrcClass);
- if (!InsertedCopy)
+ // First, try to perform the bitcast by inserting a reg-reg copy.
+ unsigned ResultReg = 0;
+ if (SrcVT.getSimpleVT() == DstVT.getSimpleVT()) {
+ TargetRegisterClass* SrcClass = TLI.getRegClassFor(SrcVT);
+ TargetRegisterClass* DstClass = TLI.getRegClassFor(DstVT);
+ ResultReg = createResultReg(DstClass);
+
+ bool InsertedCopy = TII.copyRegToReg(*MBB, MBB->end(), ResultReg,
+ Op0, DstClass, SrcClass);
+ if (!InsertedCopy)
+ ResultReg = 0;
+ }
+
+ // If the reg-reg copy failed, select a BIT_CONVERT opcode.
+ if (!ResultReg)
+ ResultReg = FastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(),
+ ISD::BIT_CONVERT, Op0);
+
+ if (!ResultReg)
return I;
ValueMap[I] = ResultReg;