Fix a constant lowering bug. Now we can do load and store instructions with funky getelementptr embedded in the address operand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55975 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 13 insertions, 0 deletions

diff --git a/lib/CodeGen/SelectionDAG/FastISel.cpp b/lib/CodeGen/SelectionDAG/FastISel.cpp
index 58467b8e0e..33f4591b66 100644
--- a/lib/CodeGen/SelectionDAG/FastISel.cpp
+++ b/lib/CodeGen/SelectionDAG/FastISel.cpp
@@ -40,6 +40,9 @@ unsigned FastISel::getRegForValue(Value *V) {
     // Don't cache constant materializations.  To do so would require
     // tracking what uses they dominate.
     Reg = FastEmit_i(VT, VT, ISD::Constant, CI->getZExtValue());
+  } else if (isa<GlobalValue>(V)) {
+    return TargetMaterializeConstant(dyn_cast<Constant>(V),
+                                     MBB->getParent()->getConstantPool());
   } else if (isa<ConstantPointerNull>(V)) {
     Reg = FastEmit_i(VT, VT, ISD::Constant, 0);
   } else if (ConstantFP *CF = dyn_cast<ConstantFP>(V)) {
@@ -85,6 +88,16 @@ unsigned FastISel::getRegForValue(Value *V) {
   return Reg;
 }
 
+unsigned FastISel::lookUpRegForValue(Value *V) {
+  // Look up the value to see if we already have a register for it. We
+  // cache values defined by Instructions across blocks, and other values
+  // only locally. This is because Instructions already have the SSA
+  // def-dominatess-use requirement enforced.
+  if (ValueMap.count(V))
+    return ValueMap[V];
+  return LocalValueMap[V];
+}
+
 /// UpdateValueMap - Update the value map to include the new mapping for this
 /// instruction, or insert an extra copy to get the result in a previous
 /// determined register.