Remove trailing whitespace to reduce later commit patch noise.

(Note: Eventually, commits like this will be handled via a pre-commit hook that
 does this automagically, as well as expand tabs to spaces and look for 80-col
 violations.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64827 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 392 insertions, 392 deletions

diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 30026af034..976a9ccebc 100644
--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -9,7 +9,7 @@
 //
 // This pass combines dag nodes to form fewer, simpler DAG nodes.  It can be run
 // both before and after the DAG is legalized.
-// 
+//
 //===----------------------------------------------------------------------===//
 
 #define DEBUG_TYPE "dagcombine"
@@ -89,14 +89,14 @@ namespace {
       WorkList.erase(std::remove(WorkList.begin(), WorkList.end(), N),
                      WorkList.end());
     }
-    
+
     SDValue CombineTo(SDNode *N, const SDValue *To, unsigned NumTo,
                         bool AddTo = true);
-    
+
     SDValue CombineTo(SDNode *N, SDValue Res, bool AddTo = true) {
       return CombineTo(N, &Res, 1, AddTo);
     }
-    
+
     SDValue CombineTo(SDNode *N, SDValue Res0, SDValue Res1,
                         bool AddTo = true) {
       SDValue To[] = { Res0, Res1 };
@@ -104,9 +104,9 @@ namespace {
     }
 
     void CommitTargetLoweringOpt(const TargetLowering::TargetLoweringOpt &TLO);
-    
-  private:    
-    
+
+  private:
+
     /// SimplifyDemandedBits - Check the specified integer node value to see if
     /// it can be simplified or if things it uses can be simplified by bit
     /// propagation.  If so, return true.
@@ -119,8 +119,8 @@ namespace {
 
     bool CombineToPreIndexedLoadStore(SDNode *N);
     bool CombineToPostIndexedLoadStore(SDNode *N);
-    
-    
+
+
     /// combine - call the node-specific routine that knows how to fold each
     /// particular type of node. If that doesn't do anything, try the
     /// target-specific DAG combines.
@@ -197,18 +197,18 @@ namespace {
 
     SDValue XformToShuffleWithZero(SDNode *N);
     SDValue ReassociateOps(unsigned Opc, DebugLoc DL, SDValue LHS, SDValue RHS);
-    
+
     SDValue visitShiftByConstant(SDNode *N, unsigned Amt);
 
     bool SimplifySelectOps(SDNode *SELECT, SDValue LHS, SDValue RHS);
     SDValue SimplifyBinOpWithSameOpcodeHands(SDNode *N);
     SDValue SimplifySelect(DebugLoc DL, SDValue N0, SDValue N1, SDValue N2);
-    SDValue SimplifySelectCC(DebugLoc DL, SDValue N0, SDValue N1, SDValue N2, 
-                             SDValue N3, ISD::CondCode CC, 
+    SDValue SimplifySelectCC(DebugLoc DL, SDValue N0, SDValue N1, SDValue N2,
+                             SDValue N3, ISD::CondCode CC,
                              bool NotExtCompare = false);
     SDValue SimplifySetCC(MVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond,
                           DebugLoc DL, bool foldBooleans = true);
-    SDValue SimplifyNodeWithTwoResults(SDNode *N, unsigned LoOp, 
+    SDValue SimplifyNodeWithTwoResults(SDNode *N, unsigned LoOp,
                                          unsigned HiOp);
     SDValue CombineConsecutiveLoads(SDNode *N, MVT VT);
     SDValue ConstantFoldBIT_CONVERTofBUILD_VECTOR(SDNode *, MVT);
@@ -216,9 +216,9 @@ namespace {
     SDValue BuildUDIV(SDNode *N);
     SDNode *MatchRotate(SDValue LHS, SDValue RHS, DebugLoc DL);
     SDValue ReduceLoadWidth(SDNode *N);
-    
+
     SDValue GetDemandedBits(SDValue V, const APInt &Mask);
-    
+
     /// GatherAllAliases - Walk up chain skipping non-aliasing memory nodes,
     /// looking for aliasing nodes and adding them to the Aliases vector.
     void GatherAllAliases(SDNode *N, SDValue OriginalChain,
@@ -230,13 +230,13 @@ namespace {
                  const Value *SrcValue1, int SrcValueOffset1,
                  SDValue Ptr2, int64_t Size2,
                  const Value *SrcValue2, int SrcValueOffset2) const;
-                 
+
     /// FindAliasInfo - Extracts the relevant alias information from the memory
     /// node.  Returns true if the operand was a load.
     bool FindAliasInfo(SDNode *N,
                        SDValue &Ptr, int64_t &Size,
                        const Value *&SrcValue, int &SrcValueOffset) const;
-                       
+
     /// FindBetterChain - Walk up chain skipping non-aliasing memory nodes,
     /// looking for a better chain (aliasing node.)
     SDValue FindBetterChain(SDNode *N, SDValue Chain);
@@ -256,7 +256,7 @@ public:
         LegalTypes(false),
         Fast(fast),
         AA(A) {}
-    
+
     /// Run - runs the dag combiner on all nodes in the work list
     void Run(CombineLevel AtLevel);
   };
@@ -266,16 +266,16 @@ public:
 namespace {
 /// WorkListRemover - This class is a DAGUpdateListener that removes any deleted
 /// nodes from the worklist.
-class VISIBILITY_HIDDEN WorkListRemover : 
+class VISIBILITY_HIDDEN WorkListRemover :
   public SelectionDAG::DAGUpdateListener {
   DAGCombiner &DC;
 public:
   explicit WorkListRemover(DAGCombiner &dc) : DC(dc) {}
-  
+
   virtual void NodeDeleted(SDNode *N, SDNode *E) {
     DC.removeFromWorkList(N);
   }
-  
+
   virtual void NodeUpdated(SDNode *N) {
     // Ignore updates.
   }
@@ -326,13 +326,13 @@ static char isNegatibleForFree(SDValue Op, bool LegalOperations,
 
   // fneg is removable even if it has multiple uses.
   if (Op.getOpcode() == ISD::FNEG) return 2;
-  
+
   // Don't allow anything with multiple uses.
   if (!Op.hasOneUse()) return 0;
-  
+
   // Don't recurse exponentially.
   if (Depth > 6) return 0;
-  
+
   switch (Op.getOpcode()) {
   default: return false;
   case ISD::ConstantFP:
@@ -342,29 +342,29 @@ static char isNegatibleForFree(SDValue Op, bool LegalOperations,
   case ISD::FADD:
     // FIXME: determine better conditions for this xform.
     if (!UnsafeFPMath) return 0;
-    
+
     // fold (fsub (fadd A, B)) -> (fsub (fneg A), B)
     if (char V = isNegatibleForFree(Op.getOperand(0), LegalOperations, Depth+1))
       return V;
     // fold (fneg (fadd A, B)) -> (fsub (fneg B), A)
     return isNegatibleForFree(Op.getOperand(1), LegalOperations, Depth+1);
   case ISD::FSUB:
-    // We can't turn -(A-B) into B-A when we honor signed zeros. 
+    // We can't turn -(A-B) into B-A when we honor signed zeros.
     if (!UnsafeFPMath) return 0;
-    
+
     // fold (fneg (fsub A, B)) -> (fsub B, A)
     return 1;
-    
+
   case ISD::FMUL:
   case ISD::FDIV:
     if (HonorSignDependentRoundingFPMath()) return 0;
-    
+
     // fold (fneg (fmul X, Y)) -> (fmul (fneg X), Y) or (fmul X, (fneg Y))
     if (char V = isNegatibleForFree(Op.getOperand(0), LegalOperations, Depth+1))
       return V;
-      
+
     return isNegatibleForFree(Op.getOperand(1), LegalOperations, Depth+1);
-    
+
   case ISD::FP_EXTEND:
   case ISD::FP_ROUND:
   case ISD::FSIN:
@@ -378,10 +378,10 @@ static SDValue GetNegatedExpression(SDValue Op, SelectionDAG &DAG,
                                     bool LegalOperations, unsigned Depth = 0) {
   // fneg is removable even if it has multiple uses.
   if (Op.getOpcode() == ISD::FNEG) return Op.getOperand(0);
-  
+
   // Don't allow anything with multiple uses.
   assert(Op.hasOneUse() && "Unknown reuse!");
-  
+
   assert(Depth <= 6 && "GetNegatedExpression doesn't match isNegatibleForFree");
   switch (Op.getOpcode()) {
   default: assert(0 && "Unknown code");
@@ -393,56 +393,56 @@ static SDValue GetNegatedExpression(SDValue Op, SelectionDAG &DAG,
   case ISD::FADD:
     // FIXME: determine better conditions for this xform.
     assert(UnsafeFPMath);
-    
+
     // fold (fneg (fadd A, B)) -> (fsub (fneg A), B)
     if (isNegatibleForFree(Op.getOperand(0), LegalOperations, Depth+1))
       return DAG.getNode(ISD::FSUB, Op.getDebugLoc(), Op.getValueType(),
-                         GetNegatedExpression(Op.getOperand(0), DAG, 
+                         GetNegatedExpression(Op.getOperand(0), DAG,
                                               LegalOperations, Depth+1),
                          Op.getOperand(1));
     // fold (fneg (fadd A, B)) -> (fsub (fneg B), A)
     return DAG.getNode(ISD::FSUB, Op.getDebugLoc(), Op.getValueType(),
-                       GetNegatedExpression(Op.getOperand(1), DAG, 
+                       GetNegatedExpression(Op.getOperand(1), DAG,
                                             LegalOperations, Depth+1),
                        Op.getOperand(0));
   case ISD::FSUB:
-    // We can't turn -(A-B) into B-A when we honor signed zeros. 
+    // We can't turn -(A-B) into B-A when we honor signed zeros.
     assert(UnsafeFPMath);
 
     // fold (fneg (fsub 0, B)) -> B
     if (ConstantFPSDNode *N0CFP = dyn_cast<ConstantFPSDNode>(Op.getOperand(0)))
       if (N0CFP->getValueAPF().isZero())
         return Op.getOperand(1);
-    
+
     // fold (fneg (fsub A, B)) -> (fsub B, A)
     return DAG.getNode(ISD::FSUB, Op.getDebugLoc(), Op.getValueType(),
                        Op.getOperand(1), Op.getOperand(0));
-    
+
   case ISD::FMUL:
   case ISD::FDIV:
     assert(!HonorSignDependentRoundingFPMath());
-    
+
     // fold (fneg (fmul X, Y)) -> (fmul (fneg X), Y)
     if (isNegatibleForFree(Op.getOperand(0), LegalOperations, Depth+1))
       return DAG.getNode(Op.getOpcode(), Op.getDebugLoc(), Op.getValueType(),
-                         GetNegatedExpression(Op.getOperand(0), DAG, 
+                         GetNegatedExpression(Op.getOperand(0), DAG,
                                               LegalOperations, Depth+1),
                          Op.getOperand(1));
-      
+
     // fold (fneg (fmul X, Y)) -> (fmul X, (fneg Y))
     return DAG.getNode(Op.getOpcode(), Op.getDebugLoc(), Op.getValueType(),
                        Op.getOperand(0),
                        GetNegatedExpression(Op.getOperand(1), DAG,
                                             LegalOperations, Depth+1));
-    
+
   case ISD::FP_EXTEND:
   case ISD::FSIN:
     return DAG.getNode(Op.getOpcode(), Op.getDebugLoc(), Op.getValueType(),
-                       GetNegatedExpression(Op.getOperand(0), DAG, 
+                       GetNegatedExpression(Op.getOperand(0), DAG,
                                             LegalOperations, Depth+1));
   case ISD::FP_ROUND:
       return DAG.getNode(ISD::FP_ROUND, Op.getDebugLoc(), Op.getValueType(),
-                         GetNegatedExpression(Op.getOperand(0), DAG, 
+                         GetNegatedExpression(Op.getOperand(0), DAG,
                                               LegalOperations, Depth+1),
                          Op.getOperand(1));
   }
@@ -451,7 +451,7 @@ static SDValue GetNegatedExpression(SDValue Op, SelectionDAG &DAG,
 
 // isSetCCEquivalent - Return true if this node is a setcc, or is a select_cc
 // that selects between the values 1 and 0, making it equivalent to a setcc.
-// Also, set the incoming LHS, RHS, and CC references to the appropriate 
+// Also, set the incoming LHS, RHS, and CC references to the appropriate
 // nodes based on the type of node we are checking.  This simplifies life a
 // bit for the callers.
 static bool isSetCCEquivalent(SDValue N, SDValue &LHS, SDValue &RHS,
@@ -462,7 +462,7 @@ static bool isSetCCEquivalent(SDValue N, SDValue &LHS, SDValue &RHS,
     CC  = N.getOperand(2);
     return true;
   }
-  if (N.getOpcode() == ISD::SELECT_CC && 
+  if (N.getOpcode() == ISD::SELECT_CC &&
       N.getOperand(2).getOpcode() == ISD::Constant &&
       N.getOperand(3).getOpcode() == ISD::Constant &&
       cast<ConstantSDNode>(N.getOperand(2))->getAPIntValue() == 1 &&
@@ -537,7 +537,7 @@ SDValue DAGCombiner::CombineTo(SDNode *N, const SDValue *To, unsigned NumTo,
                  "Cannot combine value to value of different type!"));
   WorkListRemover DeadNodes(*this);
   DAG.ReplaceAllUsesWith(N, To, &DeadNodes);
-  
+
   if (AddTo) {
     // Push the new nodes and any users onto the worklist
     for (unsigned i = 0, e = NumTo; i != e; ++i) {
@@ -545,7 +545,7 @@ SDValue DAGCombiner::CombineTo(SDNode *N, const SDValue *To, unsigned NumTo,
       AddUsersToWorkList(To[i].getNode());
     }
   }
-  
+
   // Finally, if the node is now dead, remove it from the graph.  The node
   // may not be dead if the replacement process recursively simplified to
   // something else needing this node.
@@ -553,7 +553,7 @@ SDValue DAGCombiner::CombineTo(SDNode *N, const SDValue *To, unsigned NumTo,
     // Nodes can be reintroduced into the worklist.  Make sure we do not
     // process a node that has been replaced.
     removeFromWorkList(N);
-  
+
     // Finally, since the node is now dead, remove it from the graph.
     DAG.DeleteNode(N);
   }
@@ -563,7 +563,7 @@ SDValue DAGCombiner::CombineTo(SDNode *N, const SDValue *To, unsigned NumTo,
 void
 DAGCombiner::CommitTargetLoweringOpt(const TargetLowering::TargetLoweringOpt &
                                                                           TLO) {
-  // Replace all uses.  If any nodes become isomorphic to other nodes and 
+  // Replace all uses.  If any nodes become isomorphic to other nodes and
   // are deleted, make sure to remove them from our worklist.
   WorkListRemover DeadNodes(*this);
   DAG.ReplaceAllUsesOfValueWith(TLO.Old, TLO.New, &DeadNodes);
@@ -571,19 +571,19 @@ DAGCombiner::CommitTargetLoweringOpt(const TargetLowering::TargetLoweringOpt &
   // Push the new node and any (possibly new) users onto the worklist.
   AddToWorkList(TLO.New.getNode());
   AddUsersToWorkList(TLO.New.getNode());
-  
+
   // Finally, if the node is now dead, remove it from the graph.  The node
   // may not be dead if the replacement process recursively simplified to
   // something else needing this node.
   if (TLO.Old.getNode()->use_empty()) {
     removeFromWorkList(TLO.Old.getNode());
-    
+
     // If the operands of this node are only used by the node, they will now
     // be dead.  Make sure to visit them first to delete dead nodes early.
     for (unsigned i = 0, e = TLO.Old.getNode()->getNumOperands(); i != e; ++i)
       if (TLO.Old.getNode()->getOperand(i).getNode()->hasOneUse())
         AddToWorkList(TLO.Old.getNode()->getOperand(i).getNode());
-    
+
     DAG.DeleteNode(TLO.Old.getNode());
   }
 }
@@ -596,16 +596,16 @@ bool DAGCombiner::SimplifyDemandedBits(SDValue Op, const APInt &Demanded) {
   APInt KnownZero, KnownOne;
   if (!TLI.SimplifyDemandedBits(Op, Demanded, KnownZero, KnownOne, TLO))
     return false;
-  
+
   // Revisit the node.
   AddToWorkList(Op.getNode());
-  
+
   // Replace the old value with the new one.
   ++NodesCombined;
   DOUT << "\nReplacing.2 "; DEBUG(TLO.Old.getNode()->dump(&DAG));
   DOUT << "\nWith: "; DEBUG(TLO.New.getNode()->dump(&DAG));
   DOUT << '\n';
-  
+
   CommitTargetLoweringOpt(TLO);
   return true;
 }
@@ -630,42 +630,42 @@ void DAGCombiner::Run(CombineLevel AtLevel) {
   // to the root node, preventing it from being deleted, and tracking any
   // changes of the root.
   HandleSDNode Dummy(DAG.getRoot());
-  
+
   // The root of the dag may dangle to deleted nodes until the dag combiner is
   // done.  Set it to null to avoid confusion.
   DAG.setRoot(SDValue());
-  
+
   // while the worklist isn't empty, inspect the node on the end of it and
   // try and combine it.
   while (!WorkList.empty()) {
     SDNode *N = WorkList.back();
     WorkList.pop_back();
-    
+
     // If N has no uses, it is dead.  Make sure to revisit all N's operands once
     // N is deleted from the DAG, since they too may now be dead or may have a
     // reduced number of uses, allowing other xforms.
     if (N->use_empty() && N != &Dummy) {
       for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
         AddToWorkList(N->getOperand(i).getNode());
-      
+
       DAG.DeleteNode(N);
       continue;
     }
-    
+
     SDValue RV = combine(N);
-    
+
     if (RV.getNode() == 0)
       continue;
-    
+
     ++NodesCombined;
-    
+
     // If we get back the same node we passed in, rather than a new node or
     // zero, we know that the node must have defined multiple values and
-    // CombineTo was used.  Since CombineTo takes care of the worklist 
+    // CombineTo was used.  Since CombineTo takes care of the worklist
     // mechanics for us, we have no work to do in this case.
     if (RV.getNode() == N)
       continue;
-    
+
     assert(N->getOpcode() != ISD::DELETED_NODE &&
            RV.getNode()->getOpcode() != ISD::DELETED_NODE &&
            "Node was deleted but visit returned new node!");
@@ -682,17 +682,17 @@ void DAGCombiner::Run(CombineLevel AtLevel) {
       SDValue OpV = RV;
       DAG.ReplaceAllUsesWith(N, &OpV, &DeadNodes);
     }
-      
+
     // Push the new node and any users onto the worklist
     AddToWorkList(RV.getNode());
     AddUsersToWorkList(RV.getNode());
-    
+
     // Add any uses of the old node to the worklist in case this node is the
     // last one that uses them.  They may become dead after this node is
     // deleted.
     for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
       AddToWorkList(N->getOperand(i).getNode());
-      
+
     // Finally, if the node is now dead, remove it from the graph.  The node
     // may not be dead if the replacement process recursively simplified to
     // something else needing this node.
@@ -700,12 +700,12 @@ void DAGCombiner::Run(CombineLevel AtLevel) {
       // Nodes can be reintroduced into the worklist.  Make sure we do not
       // process a node that has been replaced.
       removeFromWorkList(N);
-    
+
       // Finally, since the node is now dead, remove it from the graph.
       DAG.DeleteNode(N);
     }
   }
-  
+
   // If the root changed (e.g. it was a dead load, update the root).
   DAG.setRoot(Dummy.getValue());
 }
@@ -789,16 +789,16 @@ SDValue DAGCombiner::combine(SDNode *N) {
         TLI.hasTargetDAGCombine((ISD::NodeType)N->getOpcode())) {
 
       // Expose the DAG combiner to the target combiner impls.
-      TargetLowering::DAGCombinerInfo 
+      TargetLowering::DAGCombinerInfo
         DagCombineInfo(DAG, Level == Unrestricted, false, this);
 
       RV = TLI.PerformDAGCombine(N, DagCombineInfo);
     }
   }
 
-  // If N is a commutative binary node, try commuting it to enable more 
+  // If N is a commutative binary node, try commuting it to enable more
   // sdisel CSE.
-  if (RV.getNode() == 0 && 
+  if (RV.getNode() == 0 &&
       SelectionDAG::isCommutativeBinOp(N->getOpcode()) &&
       N->getNumValues() == 1) {
     SDValue N0 = N->getOperand(0);
@@ -815,7 +815,7 @@ SDValue DAGCombiner::combine(SDNode *N) {
   }
 
   return RV;
-} 
+}
 
 /// getInputChainForNode - Given a node, return its input chain if it has one,
 /// otherwise return a null sd operand.
@@ -841,31 +841,31 @@ SDValue DAGCombiner::visitTokenFactor(SDNode *N) {
     if (getInputChainForNode(N->getOperand(1).getNode()) == N->getOperand(0))
       return N->getOperand(1);
   }
-  
+
   SmallVector<SDNode *, 8> TFs;     // List of token factors to visit.
   SmallVector<SDValue, 8> Ops;    // Ops for replacing token factor.
-  SmallPtrSet<SDNode*, 16> SeenOps; 
+  SmallPtrSet<SDNode*, 16> SeenOps;
   bool Changed = false;             // If we should replace this token factor.
-  
+
   // Start out with this token factor.
   TFs.push_back(N);
-  
+
   // Iterate through token factors.  The TFs grows when new token factors are
   // encountered.
   for (unsigned i = 0; i < TFs.size(); ++i) {
     SDNode *TF = TFs[i];
-    
+
     // Check each of the operands.
     for (unsigned i = 0, ie = TF->getNumOperands(); i != ie; ++i) {
       SDValue Op = TF->getOperand(i);
-      
+
       switch (Op.getOpcode()) {
       case ISD::EntryToken:
         // Entry tokens don't need to be added to the list. They are
         // rededundant.
         Changed = true;
         break;
-        
+
       case ISD::TokenFactor:
         if ((CombinerAA || Op.hasOneUse()) &&
             std::find(TFs.begin(), TFs.end(), Op.getNode()) == TFs.end()) {
@@ -877,7 +877,7 @@ SDValue DAGCombiner::visitTokenFactor(SDNode *N) {
           break;
         }
         // Fall thru
-        
+
       default:
         // Only add if it isn't already in the list.
         if (SeenOps.insert(Op.getNode()))
@@ -905,7 +905,7 @@ SDValue DAGCombiner::visitTokenFactor(SDNode *N) {
     // Don't add users to work list.
     return CombineTo(N, Result, false);
   }
-  
+
   return Result;
 }
 
@@ -1092,7 +1092,7 @@ SDValue DAGCombiner::visitADD(SDNode *N) {
 
   if (!VT.isVector() && SimplifyDemandedBits(SDValue(N, 0)))
     return SDValue(N, 0);
-  
+
   // fold (a+b) -> (a|b) iff a and b share no bits.
   if (VT.isInteger() && !VT.isVector()) {
     APInt LHSZero, LHSOne;
@@ -1102,7 +1102,7 @@ SDValue DAGCombiner::visitADD(SDNode *N) {
 
     if (LHSZero.getBoolValue()) {
       DAG.ComputeMaskedBits(N1, Mask, RHSZero, RHSOne);
-      
+
       // If all possibly-set bits on the LHS are clear on the RHS, return an OR.
       // If all possibly-set bits on the RHS are clear on the LHS, return an OR.
       if ((RHSZero & (~LHSZero & Mask)) == (~LHSZero & Mask) ||
@@ -1140,22 +1140,22 @@ SDValue DAGCombiner::visitADDC(SDNode *N) {
   ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
   ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
   MVT VT = N0.getValueType();
-  
+
   // If the flag result is dead, turn this into an ADD.
   if (N->hasNUsesOfValue(0, 1))
     return CombineTo(N, DAG.getNode(ISD::ADD, N->getDebugLoc(), VT, N1, N0),
                      DAG.getNode(ISD::CARRY_FALSE,
                                  N->getDebugLoc(), MVT::Flag));
-  
+
   // canonicalize constant to RHS.
   if (N0C && !N1C)
     return DAG.getNode(ISD::ADDC, N->getDebugLoc(), N->getVTList(), N1, N0);
-  
+
   // fold (addc x, 0) -> x + no carry out
   if (N1C && N1C->isNullValue())
     return CombineTo(N, N0, DAG.getNode(ISD::CARRY_FALSE,
                                         N->getDebugLoc(), MVT::Flag));
-  
+
   // fold (addc a, b) -> (or a, b), CARRY_FALSE iff a and b share no bits.
   APInt LHSZero, LHSOne;
   APInt RHSZero, RHSOne;
@@ -1164,7 +1164,7 @@ SDValue DAGCombiner::visitADDC(SDNode *N) {
 
   if (LHSZero.getBoolValue()) {
     DAG.ComputeMaskedBits(N1, Mask, RHSZero, RHSOne);
-    
+
     // If all possibly-set bits on the LHS are clear on the RHS, return an OR.
     // If all possibly-set bits on the RHS are clear on the LHS, return an OR.
     if ((RHSZero & (~LHSZero & Mask)) == (~LHSZero & Mask) ||
@@ -1173,7 +1173,7 @@ SDValue DAGCombiner::visitADDC(SDNode *N) {
                        DAG.getNode(ISD::CARRY_FALSE,
                                    N->getDebugLoc(), MVT::Flag));
   }
-  
+
   return SDValue();
 }
 
@@ -1183,16 +1183,16 @@ SDValue DAGCombiner::visitADDE(SDNode *N) {
   SDValue CarryIn = N->getOperand(2);
   ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
   ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
-  
+
   // canonicalize constant to RHS
   if (N0C && !N1C)
     return DAG.getNode(ISD::ADDE, N->getDebugLoc(), N->getVTList(),
                        N1, N0, CarryIn);
-  
+
   // fold (adde x, y, false) -> (addc x, y)
   if (CarryIn.getOpcode() == ISD::CARRY_FALSE)
     return DAG.getNode(ISD::ADDC, N->getDebugLoc(), N->getVTList(), N1, N0);
-  
+
   return SDValue();
 }
 
@@ -1202,7 +1202,7 @@ SDValue DAGCombiner::visitSUB(SDNode *N) {
   ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0.getNode());
   ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
   MVT VT = N0.getValueType();
-  
+
   // fold vector ops
   if (VT.isVector()) {
     SDValue FoldedVOp = SimplifyVBinOp(N);
@@ -1224,7 +1224,7 @@ SDValue DAGCombiner::visitSUB(SDNode *N) {
     return N0.getOperand(1);
   // fold (A+B)-B -> A
   if (N0.getOpcode() == ISD::ADD && N0.getOperand(1) == N1)
-    return N0.getOperand(0); 
+    return N0.getOperand(0);
   // fold ((A+(B+or-C))-B) -> A+or-C
   if (N0.getOpcode() == ISD::ADD &&
       (N0.getOperand(1).getOpcode() == ISD::SUB ||
@@ -1280,13 +1280,13 @@ SDValue DAGCombiner::visitMUL(SDNode *N) {
   ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
   ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
   MVT VT = N0.getValueType();
-  
+
   // fold vector ops
   if (VT.isVector()) {
     SDValue FoldedVOp = SimplifyVBinOp(N);
     if (FoldedVOp.getNode()) return FoldedVOp;
   }
-  
+
   // fold (mul x, undef) -> 0
   if (N0.getOpcode() == ISD::UNDEF || N1.getOpcode() == ISD::UNDEF)
     return DAG.getConstant(0, VT);
@@ -1310,7 +1310,7 @@ SDValue DAGCombiner::visitMUL(SDNode *N) {
                                        getShiftAmountTy()));
   // fold (mul x, -(1 << c)) -> -(x << c) or (-x) << c
   if (N1C && isPowerOf2_64(-N1C->getSExtValue()))
-    // FIXME: If the input is something that is easily negated (e.g. a 
+    // FIXME: If the input is something that is easily negated (e.g. a
     // single-use add), we should put the negate there.
     return DAG.getNode(ISD::SUB, N->getDebugLoc(), VT,
                        DAG.getConstant(0, VT),
@@ -1326,7 +1326,7 @@ SDValue DAGCombiner::visitMUL(SDNode *N) {
     return DAG.getNode(ISD::MUL, N->getDebugLoc(), VT,
                        N0.getOperand(0), C3);
   }
-  
+
   // Change (mul (shl X, C), Y) -> (shl (mul X, Y), C) when the shift has one
   // use.
   {
@@ -1335,7 +1335,7 @@ SDValue DAGCombiner::visitMUL(SDNode *N) {
     if (N0.getOpcode() == ISD::SHL && isa<ConstantSDNode>(N0.getOperand(1)) &&
         N0.getNode()->hasOneUse()) {
       Sh = N0; Y = N1;
-    } else if (N1.getOpcode() == ISD::SHL && 
+    } else if (N1.getOpcode() == ISD::SHL &&
                isa<ConstantSDNode>(N1.getOperand(1)) &&
                N1.getNode()->hasOneUse()) {
       Sh = N1; Y = N0;
@@ -1350,14 +1350,14 @@ SDValue DAGCombiner::visitMUL(SDNode *N) {
   }
 
   // fold (mul (add x, c1), c2) -> (add (mul x, c2), c1*c2)
-  if (N1C && N0.getOpcode() == ISD::ADD && N0.getNode()->hasOneUse() && 
+  if (N1C && N0.getOpcode() == ISD::ADD && N0.getNode()->hasOneUse() &&
       isa<ConstantSDNode>(N0.getOperand(1)))
     return DAG.getNode(ISD::ADD, N->getDebugLoc(), VT,
                        DAG.getNode(ISD::MUL, N0.getDebugLoc(), VT,
                                    N0.getOperand(0), N1),
                        DAG.getNode(ISD::MUL, N1.getDebugLoc(), VT,
                                    N0.getOperand(1), N1));
-  
+
   // reassociate mul
   SDValue RMUL = ReassociateOps(ISD::MUL, N->getDebugLoc(), N0, N1);
   if (RMUL.getNode() != 0)
@@ -1378,7 +1378,7 @@ SDValue DAGCombiner::visitSDIV(SDNode *N) {
     SDValue FoldedVOp = SimplifyVBinOp(N);
     if (FoldedVOp.getNode()) return FoldedVOp;
   }
-  
+
   // fold (sdiv c1, c2) -> c1/c2
   if (N0C && N1C && !N1C->isNullValue())
     return DAG.FoldConstantArithmetic(ISD::SDIV, VT, N0C, N1C);
@@ -1398,7 +1398,7 @@ SDValue DAGCombiner::visitSDIV(SDNode *N) {
   }
   // fold (sdiv X, pow2) -> simple ops after legalize
   if (N1C && !N1C->isNullValue() && !TLI.isIntDivCheap() &&
-      (isPowerOf2_64(N1C->getSExtValue()) || 
+      (isPowerOf2_64(N1C->getSExtValue()) ||
        isPowerOf2_64(-N1C->getSExtValue()))) {
     // If dividing by powers of two is cheap, then don't perform the following
     // fold.
@@ -1437,7 +1437,7 @@ SDValue DAGCombiner::visitSDIV(SDNode *N) {
 
   // if integer divide is expensive and we satisfy the requirements, emit an
   // alternate sequence.
-  if (N1C && (N1C->getSExtValue() < -1 || N1C->getSExtValue() > 1) && 
+  if (N1C && (N1C->getSExtValue() < -1 || N1C->getSExtValue() > 1) &&
       !TLI.isIntDivCheap()) {
     SDValue Op = BuildSDIV(N);
     if (Op.getNode()) return Op;
@@ -1459,19 +1459,19 @@ SDValue DAGCombiner::visitUDIV(SDNode *N) {
   ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0.getNode());
   ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
   MVT VT = N->getValueType(0);
-  
+
   // fold vector ops
   if (VT.isVector()) {
     SDValue FoldedVOp = SimplifyVBinOp(N);
     if (FoldedVOp.getNode()) return FoldedVOp;
   }
-  
+
   // fold (udiv c1, c2) -> c1/c2
   if (N0C && N1C && !N1C->isNullValue())
     return DAG.FoldConstantArithmetic(ISD::UDIV, VT, N0C, N1C);
   // fold (udiv x, (1 << c)) -> x >>u c
   if (N1C && N1C->getAPIntValue().isPowerOf2())
-    return DAG.getNode(ISD::SRL, N->getDebugLoc(), VT, N0, 
+    return DAG.getNode(ISD::SRL, N->getDebugLoc(), VT, N0,
                        DAG.getConstant(N1C->getAPIntValue().logBase2(),
                                        getShiftAmountTy()));
   // fold (udiv x, (shl c, y)) -> x >>u (log2(c)+y) iff c is power of 2
@@ -1511,7 +1511,7 @@ SDValue DAGCombiner::visitSREM(SDNode *N) {
   ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
   ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
   MVT VT = N->getValueType(0);
-  
+
   // fold (srem c1, c2) -> c1%c2
   if (N0C && N1C && !N1C->isNullValue())
     return DAG.FoldConstantArithmetic(ISD::SREM, VT, N0C, N1C);
@@ -1521,7 +1521,7 @@ SDValue DAGCombiner::visitSREM(SDNode *N) {
     if (DAG.SignBitIsZero(N1) && DAG.SignBitIsZero(N0))
       return DAG.getNode(ISD::UREM, N->getDebugLoc(), VT, N0, N1);
   }
-  
+
   // If X/C can be simplified by the division-by-constant logic, lower
   // X%C to the equivalent of X-X/C*C.
   if (N1C && !N1C->isNullValue()) {
@@ -1536,7 +1536,7 @@ SDValue DAGCombiner::visitSREM(SDNode *N) {
       return Sub;
     }
   }
-  
+
   // undef % X -> 0
   if (N0.getOpcode() == ISD::UNDEF)
     return DAG.getConstant(0, VT);
@@ -1553,7 +1553,7 @@ SDValue DAGCombiner::visitUREM(SDNode *N) {
   ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
   ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
   MVT VT = N->getValueType(0);
-  
+
   // fold (urem c1, c2) -> c1%c2
   if (N0C && N1C && !N1C->isNullValue())
     return DAG.FoldConstantArithmetic(ISD::UREM, VT, N0C, N1C);
@@ -1574,7 +1574,7 @@ SDValue DAGCombiner::visitUREM(SDNode *N) {
       }
     }
   }
-  
+
   // If X/C can be simplified by the division-by-constant logic, lower
   // X%C to the equivalent of X-X/C*C.
   if (N1C && !N1C->isNullValue()) {
@@ -1589,7 +1589,7 @@ SDValue DAGCombiner::visitUREM(SDNode *N) {
       return Sub;
     }
   }
-  
+
   // undef % X -> 0
   if (N0.getOpcode() == ISD::UNDEF)
     return DAG.getConstant(0, VT);
@@ -1605,7 +1605,7 @@ SDValue DAGCombiner::visitMULHS(SDNode *N) {
   SDValue N1 = N->getOperand(1);
   ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
   MVT VT = N->getValueType(0);
-  
+
   // fold (mulhs x, 0) -> 0
   if (N1C && N1C->isNullValue())
     return N1;
@@ -1626,7 +1626,7 @@ SDValue DAGCombiner::visitMULHU(SDNode *N) {
   SDValue N1 = N->getOperand(1);
   ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
   MVT VT = N->getValueType(0);
-  
+
   // fold (mulhu x, 0) -> 0
   if (N1C && N1C->isNullValue())
     return N1;
@@ -1644,7 +1644,7 @@ SDValue DAGCombiner::visitMULHU(SDNode *N) {
 /// compute two values. LoOp and HiOp give the opcodes for the two computations
 /// that are being performed. Return true if a simplification was made.
 ///
-SDValue DAGCombiner::SimplifyNodeWithTwoResults(SDNode *N, unsigned LoOp, 
+SDValue DAGCombiner::SimplifyNodeWithTwoResults(SDNode *N, unsigned LoOp,
                                                 unsigned HiOp) {
   // If the high half is not needed, just compute the low half.
   bool HiExists = N->hasAnyUseOfValue(1);
@@ -1713,14 +1713,14 @@ SDValue DAGCombiner::visitUMUL_LOHI(SDNode *N) {
 SDValue DAGCombiner::visitSDIVREM(SDNode *N) {
   SDValue Res = SimplifyNodeWithTwoResults(N, ISD::SDIV, ISD::SREM);
   if (Res.getNode()) return Res;
-  
+
   return SDValue();
 }
 
 SDValue DAGCombiner::visitUDIVREM(SDNode *N) {
   SDValue Res = SimplifyNodeWithTwoResults(N, ISD::UDIV, ISD::UREM);
   if (Res.getNode()) return Res;
-  
+
   return SDValue();
 }
 
@@ -1730,7 +1730,7 @@ SDValue DAGCombiner::SimplifyBinOpWithSameOpcodeHands(SDNode *N) {
   SDValue N0 = N->getOperand(0), N1 = N->getOperand(1);
   MVT VT = N0.getValueType();
   assert(N0.getOpcode() == N1.getOpcode() && "Bad input!");
-  
+
   // For each of OP in AND/OR/XOR:
   // fold (OP (zext x), (zext y)) -> (zext (OP x, y))
   // fold (OP (sext x), (sext y)) -> (sext (OP x, y))
@@ -1745,7 +1745,7 @@ SDValue DAGCombiner::SimplifyBinOpWithSameOpcodeHands(SDNode *N) {
     AddToWorkList(ORNode.getNode());
     return DAG.getNode(N0.getOpcode(), N->getDebugLoc(), VT, ORNode);
   }
-  
+
   // For each of OP in SHL/SRL/SRA/AND...
   //   fold (and (OP x, z), (OP y, z)) -> (OP (and x, y), z)
   //   fold (or  (OP x, z), (OP y, z)) -> (OP (or  x, y), z)
@@ -1760,7 +1760,7 @@ SDValue DAGCombiner::SimplifyBinOpWithSameOpcodeHands(SDNode *N) {
     return DAG.getNode(N0.getOpcode(), N->getDebugLoc(), VT,
                        ORNode, N0.getOperand(1));
   }
-  
+
   return SDValue();
 }
 
@@ -1772,13 +1772,13 @@ SDValue DAGCombiner::visitAND(SDNode *N) {
   ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
   MVT VT = N1.getValueType();
   unsigned BitWidth = VT.getSizeInBits();
-  
+
   // fold vector ops
   if (VT.isVector()) {
     SDValue FoldedVOp = SimplifyVBinOp(N);
     if (FoldedVOp.getNode()) return FoldedVOp;
   }
-  
+
   // fold (and x, undef) -> 0
   if (N0.getOpcode() == ISD::UNDEF || N1.getOpcode() == ISD::UNDEF)
     return DAG.getConstant(0, VT);
@@ -1812,10 +1812,10 @@ SDValue DAGCombiner::visitAND(SDNode *N) {
     if (DAG.MaskedValueIsZero(N0Op0, Mask)) {
       SDValue Zext = DAG.getNode(ISD::ZERO_EXTEND, N->getDebugLoc(),
                                  N0.getValueType(), N0Op0);
-      
+
       // Replace uses of the AND with uses of the Zero extend node.
       CombineTo(N, Zext);
-      
+
       // We actually want to replace all uses of the any_extend with the
       // zero_extend, to avoid duplicating things.  This will later cause this
       // AND to be folded.
@@ -1827,7 +1827,7 @@ SDValue DAGCombiner::visitAND(SDNode *N) {
   if (isSetCCEquivalent(N0, LL, LR, CC0) && isSetCCEquivalent(N1, RL, RR, CC1)){
     ISD::CondCode Op0 = cast<CondCodeSDNode>(CC0)->get();
     ISD::CondCode Op1 = cast<CondCodeSDNode>(CC1)->get();
-    
+
     if (LR == RR && isa<ConstantSDNode>(LR) && Op0 == Op1 &&
         LL.getValueType().isInteger()) {
       // fold (and (seteq X, 0), (seteq Y, 0)) -> (seteq (or X, Y), 0)
@@ -1872,7 +1872,7 @@ SDValue DAGCombiner::visitAND(SDNode *N) {
     SDValue Tmp = SimplifyBinOpWithSameOpcodeHands(N);
     if (Tmp.getNode()) return Tmp;
   }
-  
+
   // fold (and (sign_extend_inreg x, i16 to i32), 1) -> (and x, 1)
   // fold (and (sra)) -> (and (srl)) when possible.
   if (!VT.isVector() &&
@@ -1921,7 +1921,7 @@ SDValue DAGCombiner::visitAND(SDNode *N) {
       return SDValue(N, 0);   // Return N so it doesn't get rechecked!
     }
   }
-  
+
   // fold (and (load x), 255) -> (zextload x, i8)
   // fold (and (extload x, i16), 255) -> (zextload x, i8)
   if (N1C && N0.getOpcode() == ISD::LOAD) {
@@ -1969,7 +1969,7 @@ SDValue DAGCombiner::visitAND(SDNode *N) {
       }
     }
   }
-  
+
   return SDValue();
 }
 </