diff options
author | Dan Gohman <gohman@apple.com> | 2009-01-20 01:06:45 +0000 |
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committer | Dan Gohman <gohman@apple.com> | 2009-01-20 01:06:45 +0000 |
commit | f5add58549fe8ecd9a15cbb7c230282bd693516b (patch) | |
tree | 24b5e68ebdff5feaf033ab442492604dcb224113 /lib/CodeGen/SelectionDAG/DAGCombiner.cpp | |
parent | c2997f4a34eb544ca6ec85a5c9190feb998fc7a8 (diff) |
Fix a dagcombine to not generate loads of non-round integer types,
as its comment says, even in the case where it will be generating
extending loads. This fixes PR3216.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62557 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/DAGCombiner.cpp')
-rw-r--r-- | lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 0d90fc0748..6c5d386f02 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -3343,7 +3343,7 @@ SDValue DAGCombiner::ReduceLoadWidth(SDNode *N) { // Do not generate loads of non-round integer types since these can // be expensive (and would be wrong if the type is not byte sized). - if (isa<LoadSDNode>(N0) && N0.hasOneUse() && VT.isRound() && + if (isa<LoadSDNode>(N0) && N0.hasOneUse() && EVT.isRound() && cast<LoadSDNode>(N0)->getMemoryVT().getSizeInBits() > EVTBits && // Do not change the width of a volatile load. !cast<LoadSDNode>(N0)->isVolatile()) { |