diff options
| author | Dale Johannesen <dalej@apple.com> | 2010-12-21 20:00:06 +0000 |
|---|---|---|
| committer | Dale Johannesen <dalej@apple.com> | 2010-12-21 20:00:06 +0000 |
| commit | efc96dd38c285c1a01aa6f613f533d1205e4acb2 (patch) | |
| tree | e93add3b2dfffabec6f4b136abcef535794e016e /lib/CodeGen/SelectionDAG/DAGCombiner.cpp | |
| parent | 90b0364cff2531008831428a9b4576bf4be47c70 (diff) | |
Shift by the word size is invalid IR; don't create it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122353 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/DAGCombiner.cpp')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 75d6013ff2..c58dede823 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -2967,7 +2967,7 @@ SDValue DAGCombiner::visitSHL(SDNode *N) { N0.getOperand(1).getOpcode() == ISD::Constant) { uint64_t c1 = cast<ConstantSDNode>(N0.getOperand(1))->getZExtValue(); uint64_t c2 = N1C->getZExtValue(); - if (c1 + c2 > OpSizeInBits) + if (c1 + c2 >= OpSizeInBits) return DAG.getConstant(0, VT); return DAG.getNode(ISD::SHL, N->getDebugLoc(), VT, N0.getOperand(0), DAG.getConstant(c1 + c2, N1.getValueType())); @@ -3165,7 +3165,7 @@ SDValue DAGCombiner::visitSRL(SDNode *N) { N0.getOperand(1).getOpcode() == ISD::Constant) { uint64_t c1 = cast<ConstantSDNode>(N0.getOperand(1))->getZExtValue(); uint64_t c2 = N1C->getZExtValue(); - if (c1 + c2 > OpSizeInBits) + if (c1 + c2 >= OpSizeInBits) return DAG.getConstant(0, VT); return DAG.getNode(ISD::SRL, N->getDebugLoc(), VT, N0.getOperand(0), DAG.getConstant(c1 + c2, N1.getValueType())); |