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authorEvan Cheng <evan.cheng@apple.com>2006-12-16 06:25:23 +0000
committerEvan Cheng <evan.cheng@apple.com>2006-12-16 06:25:23 +0000
commite90460ee9ae9844d4dba9a29c39161ece61e8094 (patch)
treed166dc955e61162916db370b18d661f94a4a589b /lib/CodeGen/SelectionDAG/DAGCombiner.cpp
parent6d0b3295777f0e9e9cce27f3473c19f78e88f700 (diff)
Cannot combine an indexed load / store any further.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32629 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/DAGCombiner.cpp')
-rw-r--r--lib/CodeGen/SelectionDAG/DAGCombiner.cpp11
1 files changed, 10 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 04f21b9557..3e53130ba5 100644
--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -2727,12 +2727,17 @@ bool DAGCombiner::CombineToPreIndexedLoadStore(SDNode *N) {
SDOperand Ptr;
MVT::ValueType VT;
if (LoadSDNode *LD = dyn_cast<LoadSDNode>(N)) {
+ if (LD->getAddressingMode() != ISD::UNINDEXED)
+ return false;
VT = LD->getLoadedVT();
- if (!TLI.isIndexedLoadLegal(ISD::PRE_INC, VT) &&
+ if (LD->getAddressingMode() != ISD::UNINDEXED &&
+ !TLI.isIndexedLoadLegal(ISD::PRE_INC, VT) &&
!TLI.isIndexedLoadLegal(ISD::PRE_DEC, VT))
return false;
Ptr = LD->getBasePtr();
} else if (StoreSDNode *ST = dyn_cast<StoreSDNode>(N)) {
+ if (ST->getAddressingMode() != ISD::UNINDEXED)
+ return false;
VT = ST->getStoredVT();
if (!TLI.isIndexedStoreLegal(ISD::PRE_INC, VT) &&
!TLI.isIndexedStoreLegal(ISD::PRE_DEC, VT))
@@ -2846,12 +2851,16 @@ bool DAGCombiner::CombineToPostIndexedLoadStore(SDNode *N) {
SDOperand Ptr;
MVT::ValueType VT;
if (LoadSDNode *LD = dyn_cast<LoadSDNode>(N)) {
+ if (LD->getAddressingMode() != ISD::UNINDEXED)
+ return false;
VT = LD->getLoadedVT();
if (!TLI.isIndexedLoadLegal(ISD::POST_INC, VT) &&
!TLI.isIndexedLoadLegal(ISD::POST_DEC, VT))
return false;
Ptr = LD->getBasePtr();
} else if (StoreSDNode *ST = dyn_cast<StoreSDNode>(N)) {
+ if (ST->getAddressingMode() != ISD::UNINDEXED)
+ return false;
VT = ST->getStoredVT();
if (!TLI.isIndexedStoreLegal(ISD::POST_INC, VT) &&
!TLI.isIndexedStoreLegal(ISD::POST_DEC, VT))