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authorEvan Cheng <evan.cheng@apple.com>2007-03-23 22:13:36 +0000
committerEvan Cheng <evan.cheng@apple.com>2007-03-23 22:13:36 +0000
commite177e307fce9cf543b8f0b7a7963cc0328c5f362 (patch)
treecff95bdbefdfbf27efe22d9f530148533d4f87d3 /lib/CodeGen/SelectionDAG/DAGCombiner.cpp
parentaa040352294ccb0261d3dabbcfbe51706448cbfc (diff)
Make sure SEXTLOAD of the specific type is supported on the target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35289 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/DAGCombiner.cpp')
-rw-r--r--lib/CodeGen/SelectionDAG/DAGCombiner.cpp4
1 files changed, 4 insertions, 0 deletions
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index df951a51bb..569b1a91d7 100644
--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -2272,9 +2272,13 @@ SDOperand DAGCombiner::ReduceLoadWidth(SDNode *N) {
MVT::ValueType VT = N->getValueType(0);
MVT::ValueType EVT = N->getValueType(0);
+ // Special case: SIGN_EXTEND_INREG is basically truncating to EVT then
+ // extended to VT.
if (Opc == ISD::SIGN_EXTEND_INREG) {
ExtType = ISD::SEXTLOAD;
EVT = cast<VTSDNode>(N->getOperand(1))->getVT();
+ if (AfterLegalize && !TLI.isLoadXLegal(ISD::SEXTLOAD, EVT))
+ return SDOperand();
}
unsigned EVTBits = MVT::getSizeInBits(EVT);