diff options
author | Evan Cheng <evan.cheng@apple.com> | 2006-11-08 20:27:27 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2006-11-08 20:27:27 +0000 |
commit | b00dddd1643f207f09de382dd67675f375327bb7 (patch) | |
tree | 3a4679fddd8db9bb7a3e8f921e5b52ac331fd083 /lib/CodeGen/SelectionDAG/DAGCombiner.cpp | |
parent | 185f755deb7a4e6c635ea5816d293dc6f1c718a4 (diff) |
Match more post-indexed ops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31569 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/DAGCombiner.cpp')
-rw-r--r-- | lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index bdb2d5e2f1..430cf5c6f5 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -301,8 +301,12 @@ namespace { SDOperand BasePtr; SDOperand Offset; ISD::MemOpAddrMode AM = ISD::UNINDEXED; - if (TLI.getPostIndexedAddressParts(Op, VT, BasePtr, Offset, AM,DAG) && - BasePtr == Ptr) { + if (TLI.getPostIndexedAddressParts(Op, VT, BasePtr, Offset, AM,DAG)) { + if (Ptr == Offset) + std::swap(BasePtr, Offset); + if (Ptr != BasePtr) + continue; + // Try turning it into a post-indexed load / store except when // 1) Op must be independent of N, i.e. Op is neither a predecessor // nor a successor of N. Otherwise, if Op is folded that would |