diff options
| author | Torok Edwin <edwintorok@gmail.com> | 2009-05-23 17:29:48 +0000 |
|---|---|---|
| committer | Torok Edwin <edwintorok@gmail.com> | 2009-05-23 17:29:48 +0000 |
| commit | 6bb4958543e2b7ff412b3dac3ebf01a184193ad7 (patch) | |
| tree | 8bffda5d5211572322ad8c2a363f01f52bac765b /lib/CodeGen/SelectionDAG/DAGCombiner.cpp | |
| parent | 1f04462c22a2b0fc0bb1fc7d33b39418308fb868 (diff) | |
Fix PR4254.
The DAGCombiner created a negative shiftamount, stored in an
unsigned variable. Later the optimizer eliminated the shift entirely as being
undefined.
Example: (srl (shl X, 56) 48). ShiftAmt is 4294967288.
Fix it by checking that the shiftamount is positive, and storing in a signed
variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72331 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/DAGCombiner.cpp')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 6e0cc9f60a..a866cb5629 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -2546,13 +2546,13 @@ SDValue DAGCombiner::visitSRA(SDNode *N) { MVT TruncVT = MVT::getIntegerVT(VTValSize - N1C->getZExtValue()); // Determine the residual right-shift amount. - unsigned ShiftAmt = N1C->getZExtValue() - N01C->getZExtValue(); + signed ShiftAmt = N1C->getZExtValue() - N01C->getZExtValue(); // If the shift is not a no-op (in which case this should be just a sign // extend already), the truncated to type is legal, sign_extend is legal // on that type, and the the truncate to that type is both legal and free, // perform the transform. - if (ShiftAmt && + if ((ShiftAmt > 0) && TLI.isOperationLegalOrCustom(ISD::SIGN_EXTEND, TruncVT) && TLI.isOperationLegalOrCustom(ISD::TRUNCATE, VT) && TLI.isTruncateFree(VT, TruncVT)) { |