Rename ISD::MemOpAddrMode to ISD::MemIndexedMode

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31595 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 2 insertions, 2 deletions

diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index d211077b90..8bbcd2651c 100644
--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -202,7 +202,7 @@ namespace {
           Ptr.Val->use_size() > 1) {
         SDOperand BasePtr;
         SDOperand Offset;
-        ISD::MemOpAddrMode AM = ISD::UNINDEXED;
+        ISD::MemIndexedMode AM = ISD::UNINDEXED;
         if (TLI.getPreIndexedAddressParts(N, BasePtr, Offset, AM, DAG)) {
           // Try turning it into a pre-indexed load / store except when
           // 1) Another use of base ptr is a predecessor of N. If ptr is folded
@@ -298,7 +298,7 @@ namespace {
 
           SDOperand BasePtr;
           SDOperand Offset;
-          ISD::MemOpAddrMode AM = ISD::UNINDEXED;
+          ISD::MemIndexedMode AM = ISD::UNINDEXED;
           if (TLI.getPostIndexedAddressParts(N, Op, BasePtr, Offset, AM,DAG)) {
             if (Ptr == Offset)
               std::swap(BasePtr, Offset);