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authorDale Johannesen <dalej@apple.com>2010-12-20 20:10:50 +0000
committerDale Johannesen <dalej@apple.com>2010-12-20 20:10:50 +0000
commit025cc6e1be4cc3d780f10bb9ec92eba831a45f79 (patch)
treed35a040cdc7f9b65d0c51a319118b97d9113268a /lib/CodeGen/SelectionDAG/DAGCombiner.cpp
parentb0de244f23c2e11505cab729f198dfaaa2028532 (diff)
Cosmetic changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122259 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/DAGCombiner.cpp')
-rw-r--r--lib/CodeGen/SelectionDAG/DAGCombiner.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index c54da0dd39..c1288d5d7b 100644
--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -3172,15 +3172,15 @@ SDValue DAGCombiner::visitSRL(SDNode *N) {
}
// fold (srl (trunc (srl x, c1)), c2) -> 0 or (trunc (srl x, (add c1, c2)))
- // This is only valid if the OpSizeInBits + c1 = size of inner shift
if (N1C && N0.getOpcode() == ISD::TRUNCATE &&
N0.getOperand(0).getOpcode() == ISD::SRL &&
- N0.getOperand(0)->getOperand(1).getOpcode() == ISD::Constant) {
+ isa<ConstantSDNode>(N0.getOperand(0)->getOperand(1))) {
uint64_t c1 =
cast<ConstantSDNode>(N0.getOperand(0)->getOperand(1))->getZExtValue();
uint64_t c2 = N1C->getZExtValue();
EVT InnerShiftVT = N0.getOperand(0)->getOperand(1).getValueType();
uint64_t InnerShiftSize = InnerShiftVT.getScalarType().getSizeInBits();
+ // This is only valid if the OpSizeInBits + c1 = size of inner shift.
if (c1 + OpSizeInBits == InnerShiftSize) {
if (c1 + c2 >= InnerShiftSize)
return DAG.getConstant(0, VT);