diff options
| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2009-08-04 21:29:11 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2009-08-04 21:29:11 +0000 |
| commit | f955cbf56f130cdeb4c6c8aaa4a2715d420c1327 (patch) | |
| tree | 3f917f2b27861cb51488be75095a277ff55917c2 /lib/CodeGen/RegisterScavenging.cpp | |
| parent | 4dcff6db72fefc45119624986dd7b564274c9a21 (diff) | |
Don't give implicit machine operands special treatment in the register scavenger.
Imp-def is *not* allowed to redefine a live register.
Imp-use is *not* allowed to use a dead register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78106 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/RegisterScavenging.cpp')
| -rw-r--r-- | lib/CodeGen/RegisterScavenging.cpp | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/lib/CodeGen/RegisterScavenging.cpp b/lib/CodeGen/RegisterScavenging.cpp index 0a29ef02bc..1cd7e089ce 100644 --- a/lib/CodeGen/RegisterScavenging.cpp +++ b/lib/CodeGen/RegisterScavenging.cpp @@ -226,7 +226,7 @@ void RegScavenger::forward() { const MachineOperand MO = *UseMOs[i].first; unsigned Reg = MO.getReg(); - assert((MO.isImplicit() || isUsed(Reg)) && "Using an undefined register!"); + assert(isUsed(Reg) && "Using an undefined register!"); if (MO.isKill() && !isReserved(Reg)) { KillRegs.set(Reg); @@ -276,10 +276,7 @@ void RegScavenger::forward() { if (RedefinesSuperRegPart(MI, MO, TRI)) continue; - // Implicit def is allowed to "re-define" any register. Similarly, - // implicitly defined registers can be clobbered. - assert((MO.isImplicit() || isReserved(Reg) || isUnused(Reg) || - isSuperRegUsed(Reg) || + assert((isReserved(Reg) || isUnused(Reg) || isSuperRegUsed(Reg) || isLiveInButUnusedBefore(Reg, MI, MBB, TRI, MRI)) && "Re-defining a live register!"); setUsed(Reg); |