diff options
author | Misha Brukman <brukman+llvm@gmail.com> | 2002-12-12 23:20:31 +0000 |
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committer | Misha Brukman <brukman+llvm@gmail.com> | 2002-12-12 23:20:31 +0000 |
commit | d1bedcced2882f5c23dc3c5c8d0587ad5513345d (patch) | |
tree | 042072a0da5938c34827a80bb6ee0192aa70af17 /lib/CodeGen/RegAllocSimple.cpp | |
parent | 9ada014ec09579a7dd3833f779a1de82bd71bce1 (diff) |
Take advantage of our knowledge of 2-address X86 instructions and
register-allocated them appropriately.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4976 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/RegAllocSimple.cpp')
-rw-r--r-- | lib/CodeGen/RegAllocSimple.cpp | 31 |
1 files changed, 24 insertions, 7 deletions
diff --git a/lib/CodeGen/RegAllocSimple.cpp b/lib/CodeGen/RegAllocSimple.cpp index af9b671688..d78a75c92e 100644 --- a/lib/CodeGen/RegAllocSimple.cpp +++ b/lib/CodeGen/RegAllocSimple.cpp @@ -38,6 +38,9 @@ namespace { // Maps physical register to their register classes std::map<unsigned, const TargetRegisterClass*> PhysReg2RegClassMap; + + // Made to combat the incorrect allocation of r2 = add r1, r1 + std::map<unsigned, unsigned> VirtReg2PhysRegMap; // Maps RegClass => which index we can take a register from. Since this is a // simple register allocator, when we need a register of a certain class, we @@ -225,17 +228,30 @@ bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) { DEBUG(std::cerr << "const\n"); } else if (op.isVirtualRegister()) { virtualReg = (unsigned) op.getAllocatedRegNum(); - // save register to stack if it's a def DEBUG(std::cerr << "op: " << op << "\n"); DEBUG(std::cerr << "\t inst[" << i << "]: "; MI->print(std::cerr, TM)); - if (op.opIsDef()) { - physReg = getFreeReg(virtualReg); - MachineBasicBlock::iterator J = I; - J = saveVirtRegToStack(++J, virtualReg, physReg); - I = --J; + + // make sure the same virtual register maps to the same physical + // register in any given instruction + if (VirtReg2PhysRegMap.find(virtualReg) != VirtReg2PhysRegMap.end()) { + physReg = VirtReg2PhysRegMap[virtualReg]; } else { - I = moveUseToReg(I, virtualReg, physReg); + if (op.opIsDef()) { + if (TM.getInstrInfo().isTwoAddrInstr(MI->getOpcode()) && i == 0) { + // must be same register number as the first operand + // This maps a = b + c into b += c, and saves b into a's spot + physReg = (unsigned) MI->getOperand(1).getAllocatedRegNum(); + } else { + physReg = getFreeReg(virtualReg); + } + MachineBasicBlock::iterator J = I; + J = saveVirtRegToStack(++J, virtualReg, physReg); + I = --J; + } else { + I = moveUseToReg(I, virtualReg, physReg); + } + VirtReg2PhysRegMap[virtualReg] = physReg; } MI->SetMachineOperandReg(i, physReg); DEBUG(std::cerr << "virt: " << virtualReg << @@ -244,6 +260,7 @@ bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) { } clearAllRegs(); + VirtReg2PhysRegMap.clear(); } } |