diff options
| author | Chris Lattner <sabre@nondot.org> | 2008-01-07 01:56:04 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2008-01-07 01:56:04 +0000 |
| commit | 69244300b8a0112efb44b6273ecea4ca6264b8cf (patch) | |
| tree | b5a0565e968d692bfa45952fe63009ff1b2be001 /lib/CodeGen/RegAllocSimple.cpp | |
| parent | 6425f8be7263e625c2d7484eb2fb8f6643824f49 (diff) | |
Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects
that it is cheap and efficient to get.
Move a variety of predicates from TargetInstrInfo into
TargetInstrDescriptor, which makes it much easier to query a predicate
when you don't have TII around. Now you can use MI->getDesc()->isBranch()
instead of going through TII, and this is much more efficient anyway. Not
all of the predicates have been moved over yet.
Update old code that used MI->getInstrDescriptor()->Flags to use the
new predicates in many places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45674 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/RegAllocSimple.cpp')
| -rw-r--r-- | lib/CodeGen/RegAllocSimple.cpp | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/lib/CodeGen/RegAllocSimple.cpp b/lib/CodeGen/RegAllocSimple.cpp index 7ea9623303..3382823577 100644 --- a/lib/CodeGen/RegAllocSimple.cpp +++ b/lib/CodeGen/RegAllocSimple.cpp @@ -173,8 +173,7 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) { // This is a preliminary pass that will invalidate any registers that are // used by the instruction (including implicit uses). - unsigned Opcode = MI->getOpcode(); - const TargetInstrDescriptor &Desc = TM->getInstrInfo()->get(Opcode); + const TargetInstrDescriptor &Desc = *MI->getDesc(); const unsigned *Regs; if (Desc.ImplicitUses) { for (Regs = Desc.ImplicitUses; *Regs; ++Regs) @@ -204,7 +203,7 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) { unsigned physReg = Virt2PhysRegMap[virtualReg]; if (physReg == 0) { if (op.isDef()) { - int TiedOp = MI->getInstrDescriptor()->findTiedToSrcOperand(i); + int TiedOp = MI->getDesc()->findTiedToSrcOperand(i); if (TiedOp == -1) { physReg = getFreeReg(virtualReg); } else { |