diff options
| author | Evan Cheng <evan.cheng@apple.com> | 2006-11-10 08:43:01 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2006-11-10 08:43:01 +0000 |
| commit | 438f7bc67cf235ccee7e6f7ac7f4ae2186eb8020 (patch) | |
| tree | 9403ab5aed57a845466b76158b3286967ef517fe /lib/CodeGen/RegAllocLocal.cpp | |
| parent | e7680cef84c42bc2ee68904bc2bd0b30a312da08 (diff) | |
Add implicit def / use operands to MachineInstr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31633 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/RegAllocLocal.cpp')
| -rw-r--r-- | lib/CodeGen/RegAllocLocal.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/CodeGen/RegAllocLocal.cpp b/lib/CodeGen/RegAllocLocal.cpp index e42603e629..f91166667c 100644 --- a/lib/CodeGen/RegAllocLocal.cpp +++ b/lib/CodeGen/RegAllocLocal.cpp @@ -561,7 +561,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) { for (unsigned i = 0; i != MI->getNumOperands(); ++i) { MachineOperand& MO = MI->getOperand(i); // here we are looking for only used operands (never def&use) - if (MO.isRegister() && !MO.isDef() && MO.getReg() && + if (MO.isRegister() && !MO.isDef() && !MO.isImplicit() && MO.getReg() && MRegisterInfo::isVirtualRegister(MO.getReg())) MI = reloadVirtReg(MBB, MI, i); } @@ -596,7 +596,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) { // are defined, and marking explicit destinations in the PhysRegsUsed map. for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { MachineOperand& MO = MI->getOperand(i); - if (MO.isRegister() && MO.isDef() && MO.getReg() && + if (MO.isRegister() && MO.isDef() && !MO.isImplicit() && MO.getReg() && MRegisterInfo::isPhysicalRegister(MO.getReg())) { unsigned Reg = MO.getReg(); if (PhysRegsUsed[Reg] == -2) continue; // Something like ESP. |