diff options
| author | Owen Anderson <resistor@mac.com> | 2008-07-23 19:47:27 +0000 |
|---|---|---|
| committer | Owen Anderson <resistor@mac.com> | 2008-07-23 19:47:27 +0000 |
| commit | 496bac5b084474ac33109bad24c1ef94c843e16f (patch) | |
| tree | 46276e5ccb953cc67f753171431bc36d8f1436ed /lib/CodeGen/RegAllocLinearScan.cpp | |
| parent | 1a24539405bb1adb7198c8ebafc6cd82218c604b (diff) | |
Fix a compile-time regression introduced by my heuristic-changing patch. I forgot
to multiply the instruction count by a constant factor in a few places, which
caused the register allocator to require many more iterations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53959 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/RegAllocLinearScan.cpp')
| -rw-r--r-- | lib/CodeGen/RegAllocLinearScan.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/CodeGen/RegAllocLinearScan.cpp b/lib/CodeGen/RegAllocLinearScan.cpp index 4df172d40c..ad830b2535 100644 --- a/lib/CodeGen/RegAllocLinearScan.cpp +++ b/lib/CodeGen/RegAllocLinearScan.cpp @@ -852,7 +852,7 @@ void RALinScan::assignRegOrStackSlotAtInterval(LiveInterval* cur) // All registers must have inf weight. Just grab one! minReg = BestPhysReg ? BestPhysReg : *RC->allocation_order_begin(*mf_); if (cur->weight == HUGE_VALF || - li_->getApproximateInstructionCount(*cur) == 1) + li_->getApproximateInstructionCount(*cur) == 0) // Spill a physical register around defs and uses. li_->spillPhysRegAroundRegDefsUses(*cur, minReg, *vrm_); } |