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authorChris Lattner <sabre@nondot.org>2005-01-08 19:53:50 +0000
committerChris Lattner <sabre@nondot.org>2005-01-08 19:53:50 +0000
commit5e5fb942e6bcdb5436c60f0343cefaa73b82d2f8 (patch)
tree3a93ca960bc6f0b8eb136d8335e75db560aa1431 /lib/CodeGen/RegAllocIterativeScan.cpp
parentf26bc8ef4827cf0023a7052b62b920b41813d473 (diff)
Silence VS warnings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19385 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/RegAllocIterativeScan.cpp')
-rw-r--r--lib/CodeGen/RegAllocIterativeScan.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/CodeGen/RegAllocIterativeScan.cpp b/lib/CodeGen/RegAllocIterativeScan.cpp
index d523906392..ddbb52a880 100644
--- a/lib/CodeGen/RegAllocIterativeScan.cpp
+++ b/lib/CodeGen/RegAllocIterativeScan.cpp
@@ -394,7 +394,7 @@ void RA::assignRegOrSpillAtInterval(IntervalPtrs::value_type cur)
DEBUG(std::cerr << "\tassigning stack slot at interval "<< *cur << ":\n");
- float minWeight = HUGE_VAL;
+ float minWeight = (float)HUGE_VAL;
unsigned minReg = 0;
const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(cur->reg);
for (TargetRegisterClass::iterator i = rc->allocation_order_begin(*mf_),