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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-08-05 21:28:14 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-08-05 21:28:14 +0000 |
| commit | f39031b360f135ece3bdc86151804dd1f3f51733 (patch) | |
| tree | a02e46268ed8a7ce01105399a1e24363f86e9de6 /lib/CodeGen/RegAllocGreedy.cpp | |
| parent | 19dec207fcc0f04902b7f097b7771ba7abba43fb (diff) | |
Detect proper register sub-classes.
Some instructions require restricted register classes, but most of the
time that doesn't affect register allocation. For example, some
instructions don't work with the stack pointer, but that is a reserved
register anyway.
Sometimes it matters, GR32_ABCD only has 4 allocatable registers. For
such a proper sub-class, the register allocator should try to enable
register class inflation since that makes more registers available for
allocation.
Make sure only legal super-classes are considered. For example, tGPR is
not a proper sub-class in Thumb mode, but in ARM mode it is.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136981 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/RegAllocGreedy.cpp')
0 files changed, 0 insertions, 0 deletions