diff options
author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-07-25 16:49:11 +0000 |
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committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-07-25 16:49:11 +0000 |
commit | eba2bbb58cafcb1ec0fa50d5e8a1c6a8cac2f780 (patch) | |
tree | 1767fc6bf575e0e7ca7d8be0df0561090549212b /lib/CodeGen/MachineVerifier.cpp | |
parent | 51004dff923259c90591621e7151408ad94e0eb8 (diff) |
Verify two-address constraints more carefully.
Include <undef> operands and virtual registers after leaving SSA form.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160734 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/MachineVerifier.cpp')
-rw-r--r-- | lib/CodeGen/MachineVerifier.cpp | 21 |
1 files changed, 7 insertions, 14 deletions
diff --git a/lib/CodeGen/MachineVerifier.cpp b/lib/CodeGen/MachineVerifier.cpp index d8dece66d8..cce9201dc8 100644 --- a/lib/CodeGen/MachineVerifier.cpp +++ b/lib/CodeGen/MachineVerifier.cpp @@ -685,6 +685,12 @@ MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum) { if (MRI->tracksLiveness() && !MI->isDebugValue()) checkLiveness(MO, MONum); + // Verify two-address constraints after leaving SSA form. + unsigned DefIdx; + if (!MRI->isSSA() && MO->isUse() && + MI->isRegTiedToDefOperand(MONum, &DefIdx) && + Reg != MI->getOperand(DefIdx).getReg()) + report("Two-address instruction operands must be identical", MO, MONum); // Check register classes. if (MONum < MCID.getNumOperands() && !MO->isImplicit()) { @@ -786,20 +792,7 @@ void MachineVerifier::checkLiveness(const MachineOperand *MO, unsigned MONum) { if (MO->readsReg()) { regsLiveInButUnused.erase(Reg); - bool isKill = false; - unsigned defIdx; - if (MI->isRegTiedToDefOperand(MONum, &defIdx)) { - // A two-addr use counts as a kill if use and def are the same. - unsigned DefReg = MI->getOperand(defIdx).getReg(); - if (Reg == DefReg) - isKill = true; - else if (TargetRegisterInfo::isPhysicalRegister(Reg)) { - report("Two-address instruction operands must be identical", MO, MONum); - } - } else - isKill = MO->isKill(); - - if (isKill) + if (MO->isKill()) addRegWithSubRegs(regsKilled, Reg); // Check that LiveVars knows this kill. |