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author | Andrew Trick <atrick@apple.com> | 2012-02-10 04:10:36 +0000 |
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committer | Andrew Trick <atrick@apple.com> | 2012-02-10 04:10:36 +0000 |
commit | 8dd26253f54247e77e5accfdd70e7b4bf27b39c2 (patch) | |
tree | df14b7b3cec3b603bc5feb7070a05f00eb83d4a5 /lib/CodeGen/MachineScheduler.cpp | |
parent | 16f72dd68653bd4984363483cfc15ce91fa613d4 (diff) |
RegAlloc superpass: includes phi elimination, coalescing, and scheduling.
Creates a configurable regalloc pipeline.
Ensure specific llc options do what they say and nothing more: -reglloc=... has no effect other than selecting the allocator pass itself. This patch introduces a new umbrella flag, "-optimize-regalloc", to enable/disable the optimizing regalloc "superpass". This allows for example testing coalscing and scheduling under -O0 or vice-versa.
When a CodeGen pass requires the MachineFunction to have a particular property, we need to explicitly define that property so it can be directly queried rather than naming a specific Pass. For example, to check for SSA, use MRI->isSSA, not addRequired<PHIElimination>.
CodeGen transformation passes are never "required" as an analysis
ProcessImplicitDefs does not require LiveVariables.
We have a plan to massively simplify some of the early passes within the regalloc superpass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150226 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/MachineScheduler.cpp')
-rw-r--r-- | lib/CodeGen/MachineScheduler.cpp | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/lib/CodeGen/MachineScheduler.cpp b/lib/CodeGen/MachineScheduler.cpp index 49c6cec23a..ba87f5a7ab 100644 --- a/lib/CodeGen/MachineScheduler.cpp +++ b/lib/CodeGen/MachineScheduler.cpp @@ -69,8 +69,6 @@ INITIALIZE_AG_DEPENDENCY(AliasAnalysis) INITIALIZE_PASS_DEPENDENCY(SlotIndexes) INITIALIZE_PASS_DEPENDENCY(LiveIntervals) INITIALIZE_PASS_DEPENDENCY(LiveDebugVariables) -INITIALIZE_PASS_DEPENDENCY(StrongPHIElimination) -INITIALIZE_PASS_DEPENDENCY(RegisterCoalescer) INITIALIZE_PASS_END(MachineScheduler, "misched", "Machine Instruction Scheduler", false, false) @@ -91,12 +89,6 @@ void MachineScheduler::getAnalysisUsage(AnalysisUsage &AU) const { AU.addPreserved<LiveIntervals>(); AU.addRequired<LiveDebugVariables>(); AU.addPreserved<LiveDebugVariables>(); - if (StrongPHIElim) { - AU.addRequiredID(StrongPHIEliminationID); - AU.addPreservedID(StrongPHIEliminationID); - } - AU.addRequiredID(RegisterCoalescerPassID); - AU.addPreservedID(RegisterCoalescerPassID); MachineFunctionPass::getAnalysisUsage(AU); } |