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| author | Kay Tiong Khoo <kkhoo@perfwizard.com> | 2013-02-12 00:19:12 +0000 |
|---|---|---|
| committer | Kay Tiong Khoo <kkhoo@perfwizard.com> | 2013-02-12 00:19:12 +0000 |
| commit | 6c3daabc3ee51a8fcb804e0f110f01e59e0e6d61 (patch) | |
| tree | fcab8b8339070a35ecf1fc7d2418566b66876428 /lib/CodeGen/MachineLoopInfo.cpp | |
| parent | c951003faf4d475d221f5e839971673d2350b983 (diff) | |
Added 0x0D to 2-byte opcode extension table for prefetch* variants
Fixed decode of existing 3dNow prefetchw instruction
Intel is scheduled to add a compatible prefetchw (same encoding) to future CPUs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174920 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/MachineLoopInfo.cpp')
0 files changed, 0 insertions, 0 deletions