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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-05-21 16:36:13 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-05-21 16:36:13 +0000 |
| commit | 2afb7505c5e9ffd08a96fdd4c43f962a50160053 (patch) | |
| tree | ac9c6a3d5362c81c28b43255dc1819fd6dbacb53 /lib/CodeGen/MachineLoopInfo.cpp | |
| parent | 63e6a488cb6c29983415221719d05fbf99e00193 (diff) | |
Teach VirtRegRewriter to handle spilling in instructions that have multiple
definitions of the virtual register.
This happens when spilling the registers produced by REG_SEQUENCE:
%reg1047:5<def>, %reg1047:6<def>, %reg1047:7<def> = VLD3d8 %reg1033, 0, pred:14, pred:%reg0
The rewriter would spill the register multiple times, dead store elimination
tried to keep up, but ended up cutting the branch it was sitting on.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104321 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/MachineLoopInfo.cpp')
0 files changed, 0 insertions, 0 deletions