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| author | Vikram S. Adve <vadve@cs.uiuc.edu> | 2001-09-30 23:43:34 +0000 |
|---|---|---|
| committer | Vikram S. Adve <vadve@cs.uiuc.edu> | 2001-09-30 23:43:34 +0000 |
| commit | c5b4632c27566de7c3fc6679b43d7da4f4a29666 (patch) | |
| tree | c0ebac373f4e0ac827c360201295513979b29720 /lib/CodeGen/MachineInstr.cpp | |
| parent | 4a87b38ba9ce13fd24d469a36360e947c01c12c9 (diff) | |
Bug fixes:
(1) Ensure that delay slot instructions are not moved out of place (this
was happening for some CALL instructions). Basically, we need to
move all delay slot instructions out of the graph and handle them
along with the delayed control transfer instruction.
(2) Mark scheduled instructions correctly when instructions are scheduled
in more than one cycle in a single step (due to delay slots).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@678 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/MachineInstr.cpp')
0 files changed, 0 insertions, 0 deletions