diff options
| author | Chris Lattner <sabre@nondot.org> | 2009-04-09 23:33:34 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2009-04-09 23:33:34 +0000 |
| commit | c30aa7b3de0ce8c37e9630e8e7a73cb83c808c62 (patch) | |
| tree | dce8ded7ac66f6ea34291580c3a4fd0459fdfbd9 /lib/CodeGen/MachineInstr.cpp | |
| parent | 3ca15c989ca0e09085648771db368d8c94ee1f19 (diff) | |
ignore register zero in isRegTiedToUseOperand, following the example of
isRegTiedToDefOperand. Thanks to Bob for pointing this out!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68734 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/MachineInstr.cpp')
| -rw-r--r-- | lib/CodeGen/MachineInstr.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp index d3b2e9a91c..a227f25190 100644 --- a/lib/CodeGen/MachineInstr.cpp +++ b/lib/CodeGen/MachineInstr.cpp @@ -698,7 +698,7 @@ bool MachineInstr::isRegTiedToUseOperand(unsigned DefOpIdx, unsigned *UseOpIdx){ if (getOpcode() == TargetInstrInfo::INLINEASM) { assert(DefOpIdx >= 2); const MachineOperand &MO = getOperand(DefOpIdx); - if (!MO.isReg() || !MO.isDef()) + if (!MO.isReg() || !MO.isDef() || MO.getReg() == 0) return false; // Determine the actual operand no corresponding to this index. unsigned DefNo = 0; |